M30800SFP-BL#D5 Renesas Electronics America, M30800SFP-BL#D5 Datasheet - Page 174

MCU 3/5V 0K 100-QFP

M30800SFP-BL#D5

Manufacturer Part Number
M30800SFP-BL#D5
Description
MCU 3/5V 0K 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet

Specifications of M30800SFP-BL#D5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SFP-BL#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30800SFP-BL#D5M30800SFP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
1
v
J
6
Table 20.2 Functions changed by I
Figure 20.4 Start/stop condition detect timing characteristics
1 .
0
C
Function
Interrupt no. 33, 35, 37 factor
Interrupt no. 34, 36, 38 factor
DMA factor
Data transfer timing from UARTi (i
= 2 to 4) receive shift register to re-
ceive buffer
UARTi(i = 2 to 4) receive / ACK in-
terrupt request generation timing
9
0 .
8 /
B
Note : Cycle number shows main clock input oscillation frequency f(X
0
0
3 to 6 cycles < set up time (Note)
3 to 6 cycles < hold time (Note)
UARTi Special Mode Register 3(i=2 to 4 )(Address 0335
0
1
A
Bits 5 to 7 are the SDAi digital delay setting bits. By setting these bits, it is possible to turn the SDAi
delay OFF or set the f(X
G
8
u
7
o r
. g
0 -
u
1
0
p
0
, 2
0
2
0
0
5
(Start condition)
(Stop condition)
Page 161
SCL
SDA
SDA
f o
IN
) delay to 2 to 8 cycles.
3
2
9
2
C mode select bit 2
IICM2 = 0
Acknowrege not detect (NACK)
Acknowrege detect (ACK)
Acknowrege detect (ACK)
Rising edge of the last bit of re-
ceive clock
Rising edge of the last bit of re-
ceive clock
Set up time
20. UARTi Special Mode Register (i = 2 to 4)
16,
0325
Hold time
16,
IICM2 = 1
UART2 transfer (rising edge of )
Acknowrege detect (ACK)
Acknowrege detect (ACK)
Rising edge of the last bit of re-
ceive clock
Rising edge of the last bit of re-
ceive clock
IN
02F5
) cycle number.
16
)

Related parts for M30800SFP-BL#D5