M30280F6HP#U7B Renesas Electronics America, M30280F6HP#U7B Datasheet - Page 104

• Manufacturer Part Number: M30280F6HP#U7B
• Description: IC M16C/28 MCU FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280F6HP#U7B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
9.6 INT Interrupt
e
E
1
. v
Figure 9.11 IFSR Register
J
6
_______
0
INTi interrupt (i=0 to 5) is triggered by the edges of external inputs. The edge polarity is selected using the
IFSRi bit in the IFSR register.
The INT5 input has an effective digital debounce function for a noise rejection. Refer to "17.6 Digital
Debounce function" for this detail. When using INT5 interrupt to exit stop mode, set the P17DDR register
to "FF
To use the INT4 interrupt, set the IFSR6 bit in the IFSR register to "1" (INT4). To use the INT5 interrupt, set
the IFSR7 bit in the IFSR register to "1" (INT5).
After modifiying the IFSR6 or IFSR7 bit, clear the corresponding IR bit to "0" (interrupt not requested)
before enabling the interrupt.
Figure 9.11 shows the IFSR registers.
C
2
9
2 /
0 .
______
B
0
0
8
0
________
G
4
Interrupt Request Cause Select Register
NOTES:
J
16
b7
7
a
o r
0 -
" before entering stop mode.
. n
1. When setting this bit to “1” (both edges), make sure the POL bit in the INT0IC to INT5IC registers
2. When setting this bit to “0” (SI/O3, SI/O4), make sure the POL bit in the S3IC and S4IC registers
u
b6
2
3
p
0
________
is set to “0” (falling edge).
is set to “0” (falling edge).
, 1
0
(
b5
M
2
0
1
b4
0
6
7
C
b3
2 /
, 8
b2
page 82
M
b1
1
6
b0
C
2 /
f o
Bit Symbol
8
IFSR0
IFSR1
IFSR2
IFSR3
IFSR4
IFSR5
IFSR6
IFSR7
3
) B
8
5
Symbol
IFSR
________
INT0 interrupt polarity
switching bit
INT1 interrupt polarity
switching bit
INT2 interrupt polarity
switching bit
INT3 interrupt polarity
switching bit
INT4 interrupt polarity
switching bit
INT5 interrupt polarity
switching bit
Interrupt request cause
select bit
Interrupt request cause
select bit
________
Address
035F
Bit Name
16
After Reset
00
16
________
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : SI/O3
1 : INT4
0 : SI/O4
1 : INT5
Function
(2)
(2)
(1)
(1)
(1)
(1)
(1)
(1)
________
RW
RW
RW
RW
RW
RW
RW
RW
RW
9. Interrupts