MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 6

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Developer Environment
3
The MCF5253 processor supports similar tools and third party developers as other Freescale ColdFire
products, offering a widespread, established network of tools and software vendors.
The following development support are available:
6
Mnemonic
JTAG
QSPI
RTC
BDM
SDRAMC
SIM
PLL
UART
USBOTG
Block
•
•
•
•
Evaluation boards (EVBs)
Compilers and debuggers
JTAG interfaces
Initialization tool
Developer Environment
Joint Test Action
Group
Queued Serial
Peripheral Interface
Real-Time Clock
Background Debug
Interface
Synchronous DRAM
Memory Controller
System Integration
Module
System Oscillator and
Phase Lock Loop
Universal
Asynchronous
Receiver
/Transmitter Module
USB 2.0 High-Speed
On-The-Go
Block Name
MCF5253 ColdFire
Table 1. Digital and Analog Modules (continued)
Test and
debug
Connectivity
Interface
Timer
Peripheral
Test and
debug
Peripheral
Interface
System
Integration
System
Clocking
Connectivity
Peripheral
Connectivity
Peripheral
Functional
Grouping
®
To help with system diagnostics and manufacturing testing, the MCF5253
includes dedicated user-accessible test logic that complies with the IEEE
1149.1A standard for boundary scan testability, often referred to as Joint
Test Action Group, or JTAG.
The QSPI module provides a serial peripheral interface with queued
transfer capability.
The RTC is a clock that keeps track of the current time even if the clock is
turned off.
A background-debug mode (BDM) interface provides system debug.
The SDRAM controller provides a glueless interface for one bank of
SDRAM, and can address up to 32MB. The controller supports a 16-bit
data bus. The controller operates in page mode, non-page mode, and
burst-page mode and supports SDRAMs.
The SIM provides overall control of the internal and external buses and
serves as the interface between the ColdFire core and the internal
peripherals or external devices. The SIM is responsible for the two
interrupt controllers (setting priorities and levels). And it also configures the
GPIO ports.
The oscillator operates from an external crystal connected across CRIN
and CROUT. The circuit can also operate from an external clock connected
to CRIN. The on-chip programmable PLL, which generates the processor
clock, allows the use of almost any low frequency external clock (5–35
MHz).
Three UARTs handle asynchronous serial communication.
The USB module is used for communication to a PC or communication to
slave devices; for example, to download data from a hard disc player to a
flash player, and to other devices.
Microprocessor Product Brief, Rev. 1
Brief Description
Freescale Semiconductor