C8051F042-GQR Silicon Laboratories Inc, C8051F042-GQR Datasheet - Page 299

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C8051F042-GQR

Manufacturer Part Number
C8051F042-GQR
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets

Specifications of C8051F042-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 13x10b; D/A 2x10b, 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
336-1205 - DEV KIT FOR F040/F041/F042/F043
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F042-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
23.2.3. Auto-Reload Mode
In Auto-Reload Mode, the counter/timer can be configured to count up or down and cause an interrupt/flag
to occur upon an overflow/underflow event. When counting up, the counter/timer will set its overflow/under-
flow flag (TFn) and cause an interrupt (if enabled) upon overflow/underflow, the values in the Reload/Cap-
ture Registers (RCAPnH and RCAPnL) are loaded into the timer, and the timer is restarted. When the
Timer External Enable Bit (EXENn) bit is set to ‘1’ and the Decrement Enable Bit (DCEN) is ‘0’, a ‘1’-to-‘0’
transition on the TnEX pin (configured as an input in the digital crossbar) will cause a timer reload (in addi-
tion to timer overflows causing auto-reloads). When DCEN is set to ‘1’, the state of the TnEX pin controls
whether the counter/timer counts up (increments) or down (decrements), and will not cause an auto-reload
or interrupt event. See
When counting down, the counter/timer will set its overflow/underflow flag (TFn) and cause an interrupt (if
enabled) when the value in the timer (TMRnH and TMRnL registers) matches the 16-bit value in the
Reload/Capture Registers (RCAPnH and RCAPnL). This is considered an underflow event, and will cause
the timer to load the value 0xFFFF. The timer is automatically restarted when an underflow occurs.
Counter/Timer with Auto-Reload mode is selected by clearing the CP/RLn bit. Setting TRn to logic 1
enables and starts the timer.
In Auto-Reload Mode, the External Flag (EXFn) toggles upon every overflow or underflow and does not
cause an interrupt. The EXFn flag can be thought of as the most significant bit (MSB) of a 17-bit counter.
External Clock
SYSCLK
(XTAL1)
Tn
Figure 23.5. Tn Auto-reload Mode and Toggle Mode Block Diagram
TnE
X
Crossbar
8
2
12
Crossbar
Section 23.2.1
EXENn
TRn
0
1
for information concerning configuration of a timer to count down.
TMRnCF
M
T
n
1
M
T
n
0
T
O
G
n
Reload
O
T
n
E
Rev. 1.5
TCLK
D
E
C
E
N
RCAPnL
C8051F040/1/2/3/4/5/6/7
TMRnL
0xFF
RCAPnH
TMRnH
0xFF
Toggle Logic
OVF
CP/RLn
EXENn
EXFn
C/Tn
TRn
TFn
0
1
Interrupt
(Port Pin)
Tn
297

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