M30280F6HP#D5 Renesas Electronics America, M30280F6HP#D5 Datasheet - Page 383
M30280F6HP#D5
Manufacturer Part Number
M30280F6HP#D5
Description
IC M16C MCU FLASH 48K 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet
1.M30280F6HPU9.pdf
(425 pages)
Specifications of M30280F6HP#D5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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J
6
0
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2
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B
20.6.1.3 Timer A (One-shot Timer Mode)
0
0
8
0
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. When setting TAiS bit to “0” (count stop), the followings occur:
3. Output in one-shot timer mode synchronizes with a count source internally generated. When the
4. The IR bit is set to “1” when timer operation mode is set with any of the following procedures:
5. When a trigger occurs while the timer is counting, the counter reloads the reload register value, and
6. When selecting the external trigger for the count start conditions in timer A one-shot timer mode, do
7.
G
4
J
7
a
o r
(i = 0 to 4) register, the TAi register, the ONSF register TA0TGL and TA0TGH bits and the TRGSR
register before setting the TAiS bit in the TABSR register to “1” (count starts).
Always make sure the TAiMR register, the ONSF register TA0TGL and TA0TGH bits and the
TRGSR register are modified while the TAiS bit remains “0” (count stops) regardless whether after
reset or not.
• A counter stops counting and a content of reload register is reloaded.
• TAi
• After one cycle of the CPU clock, the IR bit in TAiIC register is set to “1” (interrupt request).
external trigger has been selected, a maximun delay of one cycle of the count source occurs be-
tween the trigger input to TAi
• Select one-shot timer mode after reset.
• Change an operation mode from timer mode to one-shot timer mode.
• Change an operation mode from event counter mode to one-shot timer mode.
been made.
continues counting after a second trigger is generated and the counter is decremented once. To
generate a trigger while counting, space more than one cycle of the timer count source from the first
trigger and generate again.
not generate an external trigger 300ns before the count value of timer A is set to “0000
shot timer may stop counting.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
To use the timer Ai interrupt (the IR bit), set the IR bit to “0” after the changes listed above have
0 -
. n
If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
u
2
3
p
0
, 1
0
OUT
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2
0
1
0
6
pin outputs “L”.
7
C
2 /
page 361
, 8
M
1
6
C
2 /
f o
8
3
) B
8
5
IN
pin and output in one-shot timer mode.
_____
_____
OUT
, TA2
OUT
16
20. Precautions
and TA4
”. The one-
OUT
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