MC908GZ16MFAE Freescale Semiconductor, MC908GZ16MFAE Datasheet - Page 253
MC908GZ16MFAE
Manufacturer Part Number
MC908GZ16MFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68908GZ8CFJER.pdf
(314 pages)
Specifications of MC908GZ16MFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
ESCI, SPI, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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As an example, a clock source of 4.9152 MHz, with the TMCLKSEL set for divide-by-128 and the
TBR2–TBR0 set to {011}, the divider tap is1 and the interrupt rate calculates to:
18.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby modes.
18.6.1 Wait Mode
The timebase module remains active after execution of the WAIT instruction. In wait mode the timebase
register is not accessible by the CPU.
If the timebase functions are not required during wait mode, reduce the power consumption by stopping
the timebase before executing the WAIT instruction.
18.6.2 Stop Mode
The timebase module may remain active after execution of the STOP instruction if the internal clock
generator has been enabled to operate during stop mode through the OSCENINSTOP bit in the
configuration register. The timebase module can be used in this mode to generate a periodic wakeup from
stop mode.
If the internal clock generator has not been enabled to operate in stop mode, the timebase module will
not be active during stop mode. In stop mode, the timebase register is not accessible by the CPU.
If the timebase functions are not required during stop mode, reduce power consumption by disabling the
timebase module before executing the STOP instruction.
Freescale Semiconductor
1/(4.9152 x 10
Do not change TBR2–TBR0 bits while the timebase is enabled
(TBON = 1).
6
/128) = 26 μs
TBR2
0
0
0
0
1
1
1
1
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Table 18-1. Timebase Divider Selection
TBR1
0
0
1
1
0
0
1
1
TBR0
0
1
0
1
0
1
0
1
NOTE
32,768
8192
2048
128
64
32
16
0
8
TMBCLKSEL
Divider Tap
4,194,304
1,048,576
262144
16,384
8192
4096
2048
1024
1
Low-Power Modes
253
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