MC9S12C96CFUE Freescale Semiconductor, MC9S12C96CFUE Datasheet - Page 321
![IC MCU 96K FLASH 4K RAM 80-QFP](/photos/12/37/123774/mc9s12c96cfue_sml.jpg)
MC9S12C96CFUE
Manufacturer Part Number
MC9S12C96CFUE
Description
IC MCU 96K FLASH 4K RAM 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12C96CFUE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
8
Operating Supply Voltage
- 0.3 V to + 6.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12C96CFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC9S12C96CFUER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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10.3.3.3
This register keeps the data length field of the CAN frame.
10.3.3.4
This register defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number.
The MSCAN implements the following internal prioritization mechanisms:
Freescale Semiconductor
Module Base + 0x00XB
DLC[3:0]
Field
•
•
3:0
Reset:
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
The transmission buffer with the lowest local priority field wins the prioritization.
W
R
Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 10-32
Data Length Register (DLR)
Transmit Buffer Priority Register (TBPR)
Figure 10-34. Data Length Register (DLR) — Extended Identifier Mapping
7
x
DLC3
0
0
0
0
0
0
0
0
1
shows the effect of setting the DLC bits.
= Unused; always read “x”
6
x
Table 10-31. DLR Register Field Descriptions
DLC2
MC9S12C-Family / MC9S12GC-Family
0
0
0
0
1
1
1
1
0
Table 10-32. Data Length Codes
Data Length Code
5
x
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Rev 01.24
DLC1
4
x
0
0
1
1
0
0
1
1
0
Description
DLC3
x
3
DLC0
0
1
0
1
0
1
0
1
0
DLC2
2
x
Data Byte
Count
DLC1
0
1
2
3
4
5
6
7
8
x
1
DLC0
0
x
321
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