MC9S08GB60ACFUE Freescale Semiconductor, MC9S08GB60ACFUE Datasheet - Page 236

IC MCU 60K FLASH 4K RAM 64-LQFP

MC9S08GB60ACFUE

Manufacturer Part Number
MC9S08GB60ACFUE
Description
IC MCU 60K FLASH 4K RAM 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GB60ACFUE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08GB
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
8
Operating Supply Voltage
0 V to 1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Analog-to-Digital Converter (S08ATDV3)
14.6.2
Writes to the ATD status and control register clears the CCF flag, cancels any pending interrupts, and
initiates a new conversion.
236
1
2
3
Reset
Maximum ATD conversion clock frequency is 2 MHz. The max bus clock frequency is computed from the max ATD conversion
clock frequency times the indicated prescaler setting; i.e., for a PRS of 0, max bus clock = 2 (max ATD conversion clock
frequency) × 2 (Factor) = 4 MHz.
Use these settings if the maximum desired ATD conversion clock frequency is 1 MHz. The max bus clock frequency is
computed from the max ATD conversion clock frequency times the indicated prescaler setting; i.e., for a PRS of 0, max bus
clock = 1 (max ATD conversion clock frequency) × 2 (Factor) = 2 MHz.
Minimum ATD conversion clock frequency is 500 kHz. The min bus clock frequency is computed from the min ATD conversion
clock frequency times the indicated prescaler setting; i.e., for a PRS of 1, min bus clock = 0.5 (min ATD conversion clock
frequency) × 2 (Factor) = 1 MHz.
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
W
PRS
R
ATD Status and Control (ATD1SC)
CCF
0
7
Factor = (PRS +1) × 2
= Unimplemented or Reserved
ATDIE
10
12
14
16
18
20
22
24
26
28
30
32
Figure 14-6. ATD Status and Control Register (ATD1SC)
2
4
6
8
0
6
ATDCO
Table 14-5. Clock Prescaler Values
MC9S08GB60A Data Sheet, Rev. 2
(2 MHz max ATD Clock)
0
5
Max Bus Clock
MHz
12
16
20
20
20
20
20
20
20
20
20
20
20
20
4
8
0
4
1
(1 MHz max ATD Clock)
3
0
Max Bus Clock
MHz
10
12
14
16
18
20
20
20
20
20
20
20
2
4
6
8
ATDCH
0
2
2
(500 kHz min ATD Clock)
Freescale Semiconductor
0
Min Bus Clock
1
MHz
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
1
0
3

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