R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 478

IC R8C/25 MCU FLASH 52LQFP

R5F21257SNFP#U0

Manufacturer Part Number
R5F21257SNFP#U0
Description
IC R8C/25 MCU FLASH 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets

Specifications of R5F21257SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
21.3.2
21.3.2.1
The following workaround should be performed in timer mode.
To write to registers TRBPRE and TRBPR during count operation (TCSTF bit is set to 1), note the following
points:
Feb 29, 2008
Timer RB stops counting after a reset. Set the values in the timer RB and timer RB prescalers before the
count starts.
Even if the prescaler and timer RB is read out in 16-bit units, these registers are read 1 byte at a time by the
MCU. Consequently, the timer value may be updated during the period when these two registers are being
read.
In programmable one-shot generation mode and programmable wait one-shot generation mode, when
setting the TSTART bit in the TRBCR register to 0 (count stops) or setting the TOSSP bit in the TRBOCR
register to 1 (one-shot stops), the timer reloads the value of reload register and stops. Therefore, in
programmable one-shot generation mode and programmable wait one-shot generation mode, read the timer
count value before the timer stops.
The TCSTF bit remains 0 (count stops) for 1 to 2 cycles of the count source after setting the TSTART bit to
1 (count starts) while the count is stopped.
During this time, do not access registers associated with timer RB
The TCSTF bit remains 1 for 1 to 2 cycles of the count source after setting the TSTART bit to 0 (count
stops) while the count is in progress. Timer RB counting is stopped when the TCSTF bit is set to 0.
During this time, do not access registers associated with timer RB
NOTE:
If the TSTOP bit in the TRBCR register is set to 1 during timer operation, timer RB stops immediately.
If 1 is written to the TOSST or TOSSP bit in the TRBOCR register, the value of the TOSSTF bit changes
after one or two cycles of the count source have elapsed. If the TOSSP bit is written to 1 during the period
between when the TOSST bit is written to 1 and when the TOSSTF bit is set to 1, the TOSSTF bit may be
set to either 0 or 1 depending on the content state. Likewise, if the TOSST bit is written to 1 during the
period between when the TOSSP bit is written to 1 and when the TOSSTF bit is set to 0, the TOSSTF bit
may be set to either 0 or 1.
When the TRBPRE register is written continuously, allow three or more cycles of the count source for each
write interval.
When the TRBPR register is written continuously, allow three or more cycles of the prescaler underflow
for each write interval.
Notes on Timer RB
1. Registers associated with timer RB: TRBCR, TRBOCR, TRBIOC, TRBMR, TRBPRE, TRBSC, and
Timer mode
Page 459 of 485
TRBPR.
(1)
(1)
other than the TCSTF bit.
other than the TCSTF bit.
21. Usage Notes

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