M38039GCHKP#U0 Renesas Electronics America, M38039GCHKP#U0 Datasheet - Page 9

• Manufacturer Part Number: M38039GCHKP#U0
• Description: IC 740/3803 MCU QZROM 64LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38039GCHKP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 16.8MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3803 Group (Spec.H QzROM version)
REJ03B0166-0113 Rev.1.13
Page 7 of 100
PIN DESCRIPTION
Table 2
V
CNV
V
AV
RESET
X
X
P0
P0
P1
P1
P1
P2
P2
P3
P3
P3
P3
P3
P3
P3
P4
P4
P4
P4
P4
P4
P4
P4
P5
P5
P5
P5
P5
P5
P5
P5
P6
P6
CC
REF
IN
OUT
1
SS
0
7
0
2
0
7
0
1
2
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
7
/INT
/AN
/AN
/INT
−P1
/DA
/DA
, P3
/R
/T
/S
/S
/INT
/INT
/INT
/INT
/R
/T
/S
/S
/S
/S
/S
/S
/CNTR
/CNTR
/PWM
/INT
/AN
/AN
, V
(LED
(LED
SS
X
X
CLK3
RDY3
CLK1
RDY1
IN2
OUT2
CLK2
RDY2
X
X
SS
D
D
D
D
Pin
8
15
1
2
0
7
7
3
01
41
40
00
1
2
3
−
3
1
−
3
1
0
7
/X
/X
)−
)
/CNTR
0
1
Pin description
COUT
CIN
2
Power source
CNV
Reference
voltage
Analog power
source
Reset input
Clock input
Clock output
I/O port P0
I/O port P1
I/O port P2
I/O port P3
I/O port P4
I/O port P5
I/O port P6
SS
Name
• Apply voltage of 1.8 V − 5.5 V to V
• This pin controls the operation mode of the chip and V
• Normally connected to V
• Reference voltage input pin for A/D and D/A converters.
• Analog power source input pin for A/D and D/A converters.
• Connect to V
• Reset input pin for active “L”.
• Input and output pins for the clock generating circuit.
• Connect a ceramic resonator or quartz-crystal oscillator between the X
• When an external clock is used, connect the clock source to the X
• 8-bit CMOS I/O port.
• I/O direction register allows each pin to be individually
• CMOS compatible input level.
• CMOS 3-state output structure.
• Pull-up control is enabled in a bit unit.
• P2
• 8-bit CMOS I/O port.
• I/O direction register allows each pin to be individually
• CMOS compatible input level.
• P3
• P3
• Pull-up control of P3
• 8-bit CMOS I/O port.
• I/O direction register allows each pin to be individually
• CMOS compatible input level.
• CMOS 3-state output structure.
• Pull-up control is enabled in a bit unit.
Aug 21, 2009
writing mode.
the oscillation frequency.
open.
programmed as either input or output.
LED drive.
programmed as either input or output.
programmed as either input or output.
0
0
2
, P3
, P3
− P2
1
3
, P3
7
are N-channel open-drain output structure.
(8 bits) are enabled to output large current for
4
SS
− P3
.
7
0
are CMOS 3-state output structure.
, P3
Functions
SS
1
, P3
.
4
− P3
CC
7
, and 0 V to V
is enabled in a bit unit.
SS
.
PP
power source input pin in the QzROM
• A/D converter input pin
• Interrupt input pin
• D/A converter input pin
• Serial I/O3 function pin
• Interrupt input pin
• Sub-clock generating I/O pin
• Interrupt input pin
• Serial I/O1 function pin
• Serial I/O1, timer Z function pin
• Serial I/O2 function pin
• Timer X function pin
• Timer Y function pin
• PWM output pin
• Interrupt input pin
• A/D converter input pin
Function except a port function
(resonator connected)
IN
pin and leave the X
IN
and X
OUT
pins to set
OUT
pin