M38039GCHKP#U0 Renesas Electronics America, M38039GCHKP#U0 Datasheet - Page 58

IC 740/3803 MCU QZROM 64LQFP

M38039GCHKP#U0

Manufacturer Part Number
M38039GCHKP#U0
Description
IC 740/3803 MCU QZROM 64LQFP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M38039GCHKP#U0

Core Processor
740
Core Size
8-Bit
Speed
16.8MHz
Connectivity
SIO, UART/USART
Peripherals
LED, PWM, WDT
Number Of I /o
56
Program Memory Size
48KB (48K x 8)
Program Memory Type
QzROM
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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3803 Group (Spec.H QzROM version)
REJ03B0166-0113 Rev.1.13
Page 56 of 100
[Transmit Buffer Register 3/Receive Buffer Register 3
(TB3/RB3)] 0030
The transmit buffer register 3 and the receive buffer register 3 are
located at the same address. The transmit buffer is write-only and
the receive buffer is read-only. If a character bit length is 7 bits,
the MSB of data stored in the receive buffer is “0”.
[Serial I/O3 Status Register (SIO3STS)] 0031
The read-only serial I/O3 status register consists of seven flags
(bits 0 to 6) which indicate the operating status of the serial I/O3
function and various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is cleared to “0” when the
receive buffer register 3 is read.
If there is an error, it is detected at the same time that data is
transferred from the receive shift register 3 to the receive buffer
register 3, and the receive buffer full flag is set. A write to the
serial I/O3 status register clears all the error flags OE, PE, FE,
and SE (bit 3 to bit 6, respectively). Writing “0” to the serial I/O3
enable bit SIOE (bit 7 of the serial I/O3 control register) also
clears all the status flags, including the error flags.
Bits 0 to 6 of the serial I/O3 status register are initialized to “0” at
reset, but if the transmit enable bit (bit 4) of the serial I/O3
control register has been set to “1”, the transmit shift completion
flag (bit 2) and the transmit buffer empty flag (bit 0) become “1”.
[Serial I/O3 Control Register (SIO3CON)] 0032
The serial I/O3 control register consists of eight control bits for
the serial I/O3 function.
[UART3 Control Register (UART3CON)] 0033
The UART control register consists of four control bits (bits 0 to
3) which are valid when asynchronous serial I/O is selected and
set the data format of an data transfer, and one bit (bit 4) which is
always valid and sets the output structure of the P3
[Baud Rate Generator 3 (BRG3)] 002F
The baud rate generator determines the baud rate for serial
transfer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate
generator.
16
Aug 21, 2009
16
5
16
/T
16
16
X
D
3
pin.

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