R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 248
![IC R8C/26 MCU FLASH 32LQFP](/photos/12/37/123707/r5f21266snfp_u0_sml.jpg)
R5F21266SNFP#U0
Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 14.68
Table 14.26
Periodic interrupt
triggered every week
Periodic interrupt
triggered every day
Periodic interrupt
triggered every hour
Periodic interrupt
triggered every minute
Periodic interrupt
triggered every second
Timer RE Control Register 2
b7 b6 b5 b4
NOTE:
1.
0
Do not set multiple enable bits to 1 (enable interrupt).
Sep 26, 2008
Factor
b3 b2
TRECR2 Register in Real-Time Clock Mode
Interrupt Sources
b1 b0
Bit Symbol
TRECR2
(b7-b6)
Symbol
COMIE
DYIE
WKIE
SEIE
MNIE
HRIE
Page 229 of 453
—
Value in TREWK register is set to 000b (Sunday)
(1-week period)
TREWK register is updated (1-day period)
TREHR register is updated (1-hour period)
TREMIN register is updated (1-minute period)
TRESEC register is updated (1-second period)
Periodic interrupt triggered every
second enable bit
Periodic interrupt triggered every
minute enable bit
Periodic interrupt triggered every
hour enable bit
Periodic interrupt triggered every day
enable bit
Periodic interrupt triggered every
w eek enable bit
Compare match interrupt enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
(1)
Address
Bit Name
(1)
011Dh
(1)
(1)
(1)
Interrupt Source
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
Set to 0 in real-time clock mode.
every second
every second
every minute
every minute
every hour
every hour
every day
every day
every w eek
every w eek
After Reset
Function
00h
Interrupt Enable Bit
WKIE
MNIE
HRIE
DYIE
SEIE
14. Timers
RW
RW
RW
RW
RW
RW
RW
—
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