MC9S08AC60CFGE Freescale Semiconductor, MC9S08AC60CFGE Datasheet - Page 188

IC MCU 8BIT 60K FLASH 44-LQFP

MC9S08AC60CFGE

Manufacturer Part Number
MC9S08AC60CFGE
Description
IC MCU 8BIT 60K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08AC60CFGE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
44LQFP
Family Name
HCS08
Maximum Speed
40 MHz
For Use With
DEMO9S08AC60E - BOARD DEMO FOR MC9S08A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 10 Internal Clock Generator (S08ICGV4)
10.6.5
The internally generated clock source is guaranteed to have a period ± 25% of the nominal value. In some
cases, this may be sufficient accuracy. For other applications that require a tight frequency tolerance, a
trimming procedure is provided that will allow a very accurate source. This section outlines one example
of trimming the internal oscillator. Many other possible trimming procedures are valid and can be used.
In this particular case, the MCU has been attached to a PCB and the entire assembly is undergoing final
test with automated test equipment. A separate signal or message is provided to the MCU operating under
user provided software control. The MCU initiates a trim procedure as outlined in
tester supplies a precision reference signal.
If the intended bus frequency is near the maximum allowed for the device, it is recommended to trim using
a reduction divisor (R) twice the final value. After the trim procedure is complete, the reduction divisor
can be restored. This will prevent accidental overshoot of the maximum clock frequency.
188
Initial conditions:
1) Clock supplied from ATE has 500 μsec duty period
2) ICG configured for internal reference with 4 MHz bus
Example #4: Internal Clock Generator Trim
INCREASES THE FREQUENCY)
(DECREASING ICGTRM
ICGTRM - 128 / (2**n)
COUNT < EXPECTED = 500
(RUNNING TOO SLOW)
ICGTRM =
n = n + 1
IS n > 8?
MC9S08AC60 Series Data Sheet, Rev. 2
(COUNT = # OF BUS CLOCKS / 4)
DECREASES THE FREQUENCY)
Figure 10-17. Trim Procedure
NO
START TRIM PROCEDURE
INCOMING CLOCK WIDTH
(INCREASING ICGTRM
ICGTRM = $80, n = 1
ICGTRM + 128 / (2**n)
CASE STATEMENT
MEASURE
ICGTRM =
YES
.
COUNT > EXPECTED = 500
(RUNNING TOO FAST)
COUNT = EXPECTED = 500
Figure 10-17
Freescale Semiconductor
STORE ICGTRM VALUE
IN NON-VOLATILE
CONTINUE
MEMORY
while the

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