MC9S08AC16CFGE Freescale Semiconductor, MC9S08AC16CFGE Datasheet - Page 52

IC MCU 8BIT 16K FLASH 44-LQFP

MC9S08AC16CFGE

Manufacturer Part Number
MC9S08AC16CFGE
Description
IC MCU 8BIT 16K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC16CFGE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Package
44LQFP
Family Name
HCS08
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
I2C/SCI/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
8
Processor Series
S08AC
Core
HCS08
Data Ram Size
1 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1KB
# I/os (max)
34
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 4 Memory
burst programming. The FCDIV register must be initialized before using any FLASH commands. This
only must be done once following a reset.
4.4.4
The burst program command is used to program sequential bytes of data in less time than would be
required using the standard program command. This is possible because the high voltage to the FLASH
array does not need to be disabled between program operations. Ordinarily, when a program or erase
command is issued, an internal charge pump associated with the FLASH memory must be enabled to
supply high voltage to the array. Upon completion of the command, the charge pump is turned off. When
a burst program command is issued, the charge pump is enabled and then remains enabled after completion
of the burst program operation if these two conditions are met:
52
The next burst program command has been queued before the current program operation has
completed.
Burst Program Execution
FLASH PROGRAM AND
ERASE FLOW
Figure 4-2. FLASH Program and Erase Flowchart
MC9S08AC16 Series Data Sheet, Rev. 8
0
TO BUFFER ADDRESS AND DATA
WRITE COMMAND TO FCMD
AND CLEAR FCBEF (Note 2)
TO LAUNCH COMMAND
WRITE TO FCDIV
WRITE 1 TO FCBEF
WRITE TO FLASH
CLEAR ERROR
FACCERR ?
FPVIOL OR
FACCERR ?
FCCF ?
START
DONE
1
NO
1
(Note 1)
YES
0
Note 2: Wait at least four bus cycles
Note 1: Required only once after reset.
ERROR EXIT
before checking FCBEF or FCCF.
Freescale Semiconductor

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