R5F21114FP#W4 Renesas Electronics America, R5F21114FP#W4 Datasheet - Page 9

• Manufacturer Part Number: R5F21114FP#W4
• Description: MCU 3/5V 16K,PB-FREE 32-LQFP T&R
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/11r

Specifications of R5F21114FP#W4

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/11 Group
Rev.1.60
REJ03B0034-0160
2. Central Processing Unit (CPU)
Figure 2.1 CPU Register
Figure 2.1 shows the CPU registers. The CPU has 13 registers. Of these, R0, R1, R2, R3, A0, A1 and FB
comprise a register bank. Two sets of register banks are provided.
2.1 Data Registers (R0, R1, R2 and R3)
R0 is a 16-bit register for transfer, arithmetic and logic operations. The same applies to R1 to R3. The R0
can be split into high-order bit (R0H) and low-order bit (R0L) to be used separately as 8-bit data registers.
The same applies to R1H and R1L as R0H and R0L. R2 can be combined with R0 to be used as a 32-bit
data register (R2R0). The same applies to R3R1 as R2R0.
Jan 27, 2006
b 3 1
N O T E S :
1 . A r e g i s t e r b a n k c o m p r i s e s t h e s e r e g i s t e r s . T w o s e t s o f r e g i s t e r b a n k s a r e p r o v i d e d
page 7 of 26
R 2
R 3
b 1 5
I P L
b 1 9
b19
T h e 4 - h i g h o r d e r b i t s o f I N T B a r e I N T B H a n d
t h e 1 6 - l o w b i t s o f I N T B a r e I N T B L .
I N T B H
b 1 5
b 1 5
b 1 5
b15
R0H (high-order of R0)
R1H (high-order of R1) R1L (low-order of R1)
b 8
b7
U
PC
I
I N T B L
U S P
ISP
F L G
SB
b 8 b7
F B
R2
R3
A0
A1
O
R0L (low-order of R0)
B
S
Z
D
C
b 0
b 0
b 0
b 0
b0
b 0
D a t a r e g i s t e r s
A d d r e s s r e g i s t e r s
F r a m e b a s e r e g i s t e r s
I n t e r r u p t t a b l e r e g i s t e r
P r o g r a m c o u n t e r
U s e r s t a c k p o i n t e r
Interrupt stack pointer
Static base register
Flag register
Carry flag
D e b u g f l a g
Z e r o f l a g
Sign flag
Register bank select flag
O v e r f l o w f l a g
I n t e r r u p t e n a b l e f l a g
S t a c k p o i n t e r s e l e c t f l a g
R e s e r v e d b i t
Processor interrupt priority level
Reserved bit
2. Central Processing Unit (CPU)
( 1 )
( 1 )
( 1 )