R5F21114FP#W4 Renesas Electronics America, R5F21114FP#W4 Datasheet - Page 14

• Manufacturer Part Number: R5F21114FP#W4
• Description: MCU 3/5V 16K,PB-FREE 32-LQFP T&R
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/11r

Specifications of R5F21114FP#W4

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/11 Group
Rev.1.60
REJ03B0034-0160
X : U n d e f i n e d
N O T E S :
Table 4.3 SFR Information(3)
A d d r e s s
1 . B l a n k s p a c e s a r e r e s e r v e d . N o a c c e s s i s a l l o w e d .
2 . W h e n o u t p u t c o m p a r e m o d e ( t h e T C C 1 3 b i t i n t h e T C C 1 r e g i s t e r = 1 ) i s s e l e c t e d , t h e v a l u e a f t e r r e s e t i s s e t t o “ F F F F
0 0 8 0
0 0 8 1
0 0 8 2
0 0 8 3
0 0 8 4
0 0 8 5
0 0 8 6
0 0 8 7
0 0 8 8
0 0 8 9
0 0 8 A
0 0 8 B
0 0 8 C
0 0 8 D
0 0 8 E
0 0 8 F
0 0 9 0
0 0 9 1
0 0 9 2
0 0 9 3
0 0 9 4
0 0 9 5
0 0 9 6
0 0 9 7
0 0 9 8
0 0 9 9
0 0 9 A
0 0 9 B
0 0 9 C
0 0 9 D
0 0 9 E
0 0 9 F
0 0 A 0
0 0 A 1
0 0 A 2
0 0 A 3
0 0 A 4
0 0 A 5
0 0 A 6
0 0 A 7
0 0 A 8
0 0 A 9
0 0 A A
0 0 A B
0 0 A C
0 0 A D
0 0 A E
0 0 A F
0 0 B 0
0 0 B 1
0 0 B 2
0 0 B 3
0 0 B 4
0 0 B 5
0 0 B 6
0 0 B 7
0 0 B 8
0 0 B 9
0 0 B A
0 0 B B
0 0 B C
0 0 B D
0 0 B E
0 0 B F
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
Jan 27, 2006
T i m e r Y , Z m o d e r e g i s t e r
P r e s c a l e r Y r e g i s t e r
T i m e r Y s e c o n d a r y r e g i s t e r
T i m e r Y p r i m a r y r e g i s t e r
T i m e r Y , Z w a v e f o r m o u t p u t c o n t r o l r e g i s t e r
P r e s c a l e r Z r e g i s t e r
T i m e r Z s e c o n d a r y r e g i s t e r
T i m e r Z p r i m a r y r e g i s t e r
T i m e r Y , Z o u t p u t c o n t r o l r e g i s t e r
T i m e r X m o d e r e g i s t e r
P r e s c a l e r X r e g i s t e r
T i m e r X r e g i s t e r
T i m e r c o u n t s o u r c e s e t r e g i s t e r
T i m e r C r e g i s t e r
E x t e r n a l i n p u t e n a b l e r e g i s t e r
K e y i n p u t e n a b l e r e g i s t e r
Timer C control register 0
Timer C control register 1
C a p t u r e , c o m p a r e 0 r e g i s t e r
Compare 1 register
U A R T 0 t r a n s m i t / r e c e i v e m o d e r e g i s t e r
UART0 bit rate register
UART0 transmit buffer register
UART0 transmit/receive control register 0
U A R T 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1
U A R T 0 r e c e i v e b u f f e r r e g i s t e r
U A R T 1 t r a n s m i t / r e c e i v e m o d e r e g i s t e r
U A R T 1 b i t r a t e r e g i s t e r
U A R T 1 t r a n s m i t b u f f e r r e g i s t e r
U A R T 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0
UART1 transmit/receive control register 1
U A R T 1 r e c e i v e b u f f e r r e g i s t e r
UART transmit/receive control register 2
page 12 of 26
(1)
R e g i s t e r
T Y Z M R
P U M
T Y Z O C
T X M R
I N T E N
K I E N
P R E Y
T Y S C
T Y P R
P R E Z
T Z S C
T Z P R
P R E X
T X
T C S S
T C
TCC0
TCC1
T M 0
TM1
U 0 M R
U0BRG
U0TB
U0C0
U 0 C 1
U 0 R B
U 1 M R
U 1 B R G
U 1 T B
U 1 C 0
U1C1
U 1 R B
UCON
Symbol
4. Special Function Register (SFR)
X X
0 0
F F
F F
F F
0 0
F F
F F
F F
0 0
0 0
F F
F F
0 0
0 0
0 0
0 0
0 0
00
00
0 0
0 0
FF
FF
0 0
XX
XX
XX
00001000
0 0 0 0 0 0 1 0
X X
X X
X X
X X
X X
0 0 0 0 1 0 0 0
00000010
X X
00
0 0
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
16
16
1 6
1 6
1 6
16
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
16
16
1 6
1 6
16
16
16
1 6
1 6
1 6
1 6
1 6
1 6
A f t e r r e s e t
(2)
1 6
”.
2
2
2
2