S9S12P32J0MFT Freescale Semiconductor, S9S12P32J0MFT Datasheet - Page 499

• Manufacturer Part Number: S9S12P32J0MFT
• Description: MCU 128K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P32J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The pulse accumulator counter register reflect the number of pulses from the divided-by-64 clock since the
last reset.
14.5
The reset state of each individual bit is listed within
which details the registers and their bit fields.
14.6
This section describes interrupts originated by the TIM16B8CV2 block.
generated by the TIM16B8CV2 to communicate with the MCU.
The TIM16B8CV2 uses a total of 11 interrupt vectors. The interrupt vector offsets and interrupt numbers
are chip dependent.
14.6.1
This active high outputs will be asserted by the module to request a timer channel 7 – 0 interrupt to be
serviced by the system controller.
14.6.2
This active high output will be asserted by the module to request a timer pulse accumulator input interrupt
to be serviced by the system controller.
14.6.3
This active high output will be asserted by the module to request a timer pulse accumulator overflow
interrupt to be serviced by the system controller.
Freescale Semiconductor
1. Chip Dependent.
Interrupt
C[7:0]F
PAOVF
PAOVI
TOF
Resets
Interrupts
Channel [7:0] Interrupt (C[7:0]F)
Pulse Accumulator Input Interrupt (PAOVI)
Pulse Accumulator Overflow Interrupt (PAOVF)
The timer prescaler generates the divided-by-64 clock. If the timer is not
active, there is no divided-by-64 clock.
Offset
(1)
—
—
—
—
Vector
—
—
—
—
1
S12P-Family Reference Manual, Rev. 1.13
Table 14-24. TIM16B8CV1 Interrupts
Priority
—
—
—
—
1
Timer Channel 7–0
Pulse Accumulator
Pulse Accumulator
Timer Overflow
NOTE
Overflow
Section 14.3, “Memory Map and Register Definition”
Source
Input
Active high pulse accumulator input interrupt
Timer Module (TIM16B8CV2) Block Description
Active high timer channel interrupts 7–0
Pulse accumulator overflow interrupt
Table 14-24
Timer Overflow interrupt
Description
lists the interrupts
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