S9S12P32J0MFT Freescale Semiconductor, S9S12P32J0MFT Datasheet - Page 483

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S9S12P32J0MFT

Manufacturer Part Number
S9S12P32J0MFT
Description
MCU 128K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12P32J0MFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S12P32J0MFT
Manufacturer:
LT
Quantity:
728
Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
14.3.2.6
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0006
TSFRZ
TSWAI
Reset
Field
TEN
7
6
5
W
R
TEN
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
If for any reason the timer is not active, there is no ÷64 clock for the pulse accumulator because the ÷64 is
generated by the timer prescaler.
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer module when the MCU is in the wait mode. Timer interrupts cannot be used to get the MCU
TSWAI also affects pulse accumulator.
Timer Stops While in Freeze Mode
0 Allows the timer counter to continue running while in freeze mode.
1 Disables the timer counter whenever the MCU is in freeze mode. This is useful for emulation.
TSFRZ does not stop the pulse accumulator.
Timer System Control Register 1 (TSCR1)
0
7
out of wait.
= Unimplemented or Reserved
TSWAI
Figure 14-12. Timer System Control Register 1 (TSCR1)
0
6
Table 14-6. TSCR1 Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
TSFRZ
0
5
TFFCA
0
4
Description
PRNT
0
3
Timer Module (TIM16B8CV2) Block Description
0
0
2
0
0
1
0
0
0
483

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