MCHC908QY1VDWE Freescale Semiconductor, MCHC908QY1VDWE Datasheet - Page 41
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MCHC908QY1VDWE
Manufacturer Part Number
MCHC908QY1VDWE
Description
IC MCU 1.5K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MCHC908QY1VDWE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
Package
16SOIC W
Family Name
HC08
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Chapter 3
Analog-to-Digital Converter (ADC)
3.1 Introduction
This section describes the analog-to-digital converter (ADC). The ADC is an 8-bit, 4-channel analog-to-
digital converter. The ADC module is only available on the MC68HC908QY2, MC68HC908QT2,
MC68HC908QY4, and MC68HC908QT4.
3.2 Features
Features of the ADC module include:
3.3 Functional Description
Four ADC channels are available for sampling external sources at pins PTA0, PTA1, PTA4, and PTA5.
An analog multiplexer allows the single ADC converter to select one of the four ADC channels as an ADC
voltage input (ADCVIN). ADCVIN is converted by the successive approximation register-based counters.
The ADC resolution is eight bits. When the conversion is completed, ADC puts the result in the ADC data
register and sets a flag or generates an interrupt.
Figure 3-2
3.3.1 ADC Port I/O Pins
PTA0, PTA1, PTA4, and PTA5 are general-purpose I/O pins that are shared with the ADC channels. The
channel select bits (ADC status and control register (ADSCR), $003C), define which ADC channel/port
pin will be used as the input signal. The ADC overrides the port I/O logic by forcing that pin as input to the
ADC. The remaining ADC channels/port pins are controlled by the port I/O logic and can be used as
general-purpose I/O. Writes to the port register or data direction register (DDR) will not have any affect
on the port pin that is selected by the ADC. Read of a port pin which is in use by the ADC will return a 0
if the corresponding DDR bit is at 0. If the DDR bit is at 1, the value in the port data latch is read.
Freescale Semiconductor
•
•
•
•
•
•
4 channels with multiplexed input
Linear successive approximation with monotonicity
8-bit resolution
Single or continuous conversion
Conversion complete flag or conversion complete interrupt
Selectable ADC clock frequency
shows a block diagram of the ADC.
MC68HC908QY/QT Family Data Sheet, Rev. 6
41
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