MCHC908QY1VDWE Freescale Semiconductor, MCHC908QY1VDWE Datasheet - Page 38
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MCHC908QY1VDWE
Manufacturer Part Number
MCHC908QY1VDWE
Description
IC MCU 1.5K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MCHC908QY1VDWE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
Package
16SOIC W
Family Name
HC08
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Memory
2.6.6 FLASH Block Protect Register
The FLASH block protect register is implemented as a byte within the FLASH memory, and therefore can
only be written during a programming sequence of the FLASH memory. The value in this register
determines the starting address of the protected range within the FLASH memory.
BPR[7:0] — FLASH Protection Register Bits [7:0]
38
These eight bits in FLBPR represent bits [13:6] of a 16-bit memory address. Bits [15:14] are 1s and
bits [5:0] are 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH memory for block
protection. The FLASH is protected from this start address to the end of FLASH memory, at $FFFF.
With this mechanism, the protect start address can be XX00, XX40, XX80, or XXC0 within the FLASH
memory. See
Write to this register is by a programming sequence to the FLASH memory.
Address:
FLASH BLOCK PROTECT
Reset:
Read:
Write:
$BC (1011 1100)
$DE (1101 1110)
Figure 2-6
$BA (1011 1010)
$BB (1011 1011)
$DF (1101 1111)
$FE (1111 1110)
$B9 (1011 1001)
START ADDRESS OF
BPR[7:0]
$00–$B8
$FF
$FFBE
BPR7
Bit 7
Figure 2-5. FLASH Block Protect Register (FLBPR)
Figure 2-6. FLASH Block Protect Start Address
Table 2-2. Examples of Protect Start Address
and
BPR6
MC68HC908QY/QT Family Data Sheet, Rev. 6
Table
6
1
1
FLBPR, internal oscillator trim values, and vectors are protected
2-2.
Unaffected by reset. Initial value from factory is 1.
BPR5
5
The entire FLASH memory is not protected.
16-BIT MEMORY ADDRESS
and so on...
The entire FLASH memory is protected.
Start of Address of Protect Range
FLBPR VALUE
BPR4
4
$EEC0 (1110 1110 1100 0000)
$EE40 (1110 1110 0100 0000)
$EE80 (1110 1110 1000 0000)
$EF00 (1110 1111 0000 0000)
$F7C0 (1111 0111 1100 0000)
$F780 (1111 0111 1000 0000)
$FF80 (1111 1111 1000 0000)
BPR3
3
BPR2
0
2
0
0
BPR1
1
0
Freescale Semiconductor
0
BPR0
Bit 0
0
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