MC9S08GT16ACFDER Freescale Semiconductor, MC9S08GT16ACFDER Datasheet - Page 215

• Manufacturer Part Number: MC9S08GT16ACFDER
• Description: IC MCU 8BIT 16K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT16ACFDER

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Package: 48QFN EP
• Family Name: HCS08
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 39
• Interface Type: I2C/SCI/SPI
• On-chip Adc: 8-chx10-bit
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.4
This section provides a complete functional description of the IIC module.
13.4.1
The IIC bus system uses a serial data line (SDA) and a serial clock line (SCL) for data transfer. All devices
connected to it must have open drain or open collector outputs. A logic AND function is exercised on both
lines with external pull-up resistors. The value of these resistors is system dependent.
Normally, a standard communication is composed of four parts:
The STOP signal should not be confused with the CPU STOP instruction. The IIC bus system
communication is described briefly in the following sections and illustrated in
Freescale Semiconductor
SDA
SCL
SDA
SCL
•
•
•
•
SIGNAL
SIGNAL
START
START
START signal
Slave address transmission
Data transfer
STOP signal
MSB
MSB
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
Functional Description
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
1
1
IIC Protocol
2
2
CALLING ADDRESS
CALLING ADDRESS
3
3
4
4
5
5
6
6
Figure 13-8. IIC Bus Transmission Signals
7
7
MC9S08GT16A/GT8A Data Sheet, Rev. 1
READ/
WRITE
READ/
WRITE
LSB
LSB
8
8
ACK
ACK
BIT
BIT
9
9
XX
REPEATED
SIGNAL
XXX
START
MSB
MSB
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
D7
1
1
D6
2
2
NEW CALLING ADDRESS
D5
3
3
DATA BYTE
D4
4
4
D3
5
5
D2
6
6
D1
7
7
Inter-Integrated Circuit (S08IICV1)
Figure
READ/
WRITE
LSB
LSB
D0
8
8
ACK
BIT
NO
ACK
NO
BIT
9
9
13-8.
SIGNAL
SIGNAL
STOP
STOP
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