S9S08SG16E1CTLR Freescale Semiconductor, S9S08SG16E1CTLR Datasheet - Page 85
S9S08SG16E1CTLR
Manufacturer Part Number
S9S08SG16E1CTLR
Description
IC MCU 8BIT 16KB FLASH 28TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.S9S08SG16E1CTG.pdf
(330 pages)
Specifications of S9S08SG16E1CTLR
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
S08SG
Core
HCS08
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
S9S08SG16E1CTLRTR
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Manufacturer
Quantity
Price
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6.6.1.5
6.6.1.6
Freescale Semiconductor
PTADS[7:5,
Reserved
Reset:
Reset:
PTAMOD
PTAACK
7:5,3:0
PTAIE
PTAIF
Field
Field
3:0]
5:4
3
2
1
0
W
W
R
R
PTADS7
Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high
output drive for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port A bit n.
1 High output drive strength selected for port A bit n.
Reserved Bits — These bits are unused on this MCU, writes have no affect and could read as 1s or 0s.
Port A Interrupt Flag — PTAIF indicates when a port A interrupt is detected. Writes have no effect on PTAIF.
0 No port A interrupt detected.
1 Port A interrupt detected.
Port A Interrupt Acknowledge — Writing a 1 to PTAACK is part of the flag clearing mechanism. PTAACK
always reads as 0.
Port A Interrupt Enable — PTAIE determines whether a port A interrupt is enabled.
0 Port A interrupt request not enabled.
1 Port A interrupt request enabled.
Port A Detection Mode — PTAMOD (along with the PTAES bits) controls the detection mode of the port A
interrupt pins.
0 Port A pins detect edges only.
1 Port A pins detect both edges and levels.
Port A Drive Strength Selection Register (PTADS)
0
Port A Interrupt Status and Control Register (PTASC)
0
0
7
7
Figure 6-8. Port A Interrupt Status and Control Register (PTASC)
Figure 6-7. Drive Strength Selection for Port A Register (PTADS)
PTADS6
0
0
0
6
6
Table 6-6. PTADS Register Field Descriptions
Table 6-7. PTASC Register Field Descriptions
R
0
0
0
5
5
MC9S08SG32 Data Sheet, Rev. 8
R
0
0
0
4
4
Description
Description
PTADS3
PTAIF
3
0
3
0
PTAACK
PTADS2
Chapter 6 Parallel Input/Output Control
0
0
0
2
2
PTADS1
PTAIE
0
0
1
1
PTAMOD
PTADS0
0
0
0
0
85
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