S9S08SG16E1CTLR Freescale Semiconductor, S9S08SG16E1CTLR Datasheet - Page 17
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S9S08SG16E1CTLR
Manufacturer Part Number
S9S08SG16E1CTLR
Description
IC MCU 8BIT 16KB FLASH 28TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.S9S08SG16E1CTG.pdf
(330 pages)
Specifications of S9S08SG16E1CTLR
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
S08SG
Core
HCS08
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
S9S08SG16E1CTLRTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Section Number
13.5 Initialization/Application Information .......................................................................................... 202
14.1 Introduction ................................................................................................................................... 205
14.2 Register Definition ........................................................................................................................ 210
14.3 Functional Description .................................................................................................................. 217
15.1 Introduction ................................................................................................................................... 225
15.2 External Signal Description .......................................................................................................... 230
15.3 Modes of Operation....................................................................................................................... 231
15.4 Register Definition ........................................................................................................................ 231
Freescale Semiconductor
14.1.1 Features ........................................................................................................................... 207
14.1.2 Modes of Operation ........................................................................................................ 207
14.1.3 Block Diagram ................................................................................................................ 208
14.2.1 SCI Baud Rate Registers (SCIBDH, SCIBDL) .............................................................. 210
14.2.2 SCI Control Register 1 (SCIC1) ..................................................................................... 211
14.2.3 SCI Control Register 2 (SCIC2) ..................................................................................... 212
14.2.4 SCI Status Register 1 (SCIS1) ........................................................................................ 213
14.2.5 SCI Status Register 2 (SCIS2) ........................................................................................ 215
14.2.6 SCI Control Register 3 (SCIC3) ..................................................................................... 216
14.2.7 SCI Data Register (SCID)............................................................................................... 217
14.3.1 Baud Rate Generation ..................................................................................................... 217
14.3.2 Transmitter Functional Description ................................................................................ 218
14.3.3 Receiver Functional Description..................................................................................... 219
14.3.4 Interrupts and Status Flags.............................................................................................. 221
14.3.5 Additional SCI Functions ............................................................................................... 222
15.1.1 Features ........................................................................................................................... 227
15.1.2 Block Diagrams .............................................................................................................. 227
15.1.3 SPI Baud Rate Generation .............................................................................................. 229
15.2.1 SPSCK — SPI Serial Clock............................................................................................ 230
15.2.2 MOSI — Master Data Out, Slave Data In ...................................................................... 230
15.2.3 MISO — Master Data In, Slave Data Out ...................................................................... 230
15.2.4 SS — Slave Select........................................................................................................... 230
15.3.1 SPI in Stop Modes .......................................................................................................... 231
15.4.1 SPI Control Register 1 (SPIC1) ...................................................................................... 231
15.4.2 SPI Control Register 2 (SPIC2) ...................................................................................... 232
15.4.3 SPI Baud Rate Register (SPIBR).................................................................................... 233
15.4.4 SPI Status Register (SPIS) .............................................................................................. 234
15.4.5 SPI Data Register (SPID)................................................................................................ 235
Serial Communications Interface (S08SCIV4)
Serial Peripheral Interface (S08SPIV3)
MC9S08SG32 Data Sheet, Rev. 8
Chapter 14
Chapter 15
Title
Page
17
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