MC9S08SH16CTGR Freescale Semiconductor, MC9S08SH16CTGR Datasheet - Page 133
MC9S08SH16CTGR
Manufacturer Part Number
MC9S08SH16CTGR
Description
MCU 8BIT 16K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08SH16CTG.pdf
(328 pages)
Specifications of MC9S08SH16CTGR
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Package
16TSSOP
Family Name
HCS08
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
13
Interface Type
SCI/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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9.3.8
Freescale Semiconductor
The pin control registers are used to disable the I/O port control of MCU pins used as analog inputs.
APCTL1 is used to control the pins associated with channels 0–7 of the ADC module.
ADPC7
ADPC6
ADPC5
ADPC4
ADPC3
ADPC2
Field
7
6
5
4
3
2
Reset:
W
R
Pin Control 1 Register (APCTL1)
ADC Pin Control 7 — ADPC7 is used to control the pin associated with channel AD7.
0 AD7 pin I/O control enabled
1 AD7 pin I/O control disabled
ADC Pin Control 6 — ADPC6 is used to control the pin associated with channel AD6.
0 AD6 pin I/O control enabled
1 AD6 pin I/O control disabled
ADC Pin Control 5 — ADPC5 is used to control the pin associated with channel AD5.
0 AD5 pin I/O control enabled
1 AD5 pin I/O control disabled
ADC Pin Control 4 — ADPC4 is used to control the pin associated with channel AD4.
0 AD4 pin I/O control enabled
1 AD4 pin I/O control disabled
ADC Pin Control 3 — ADPC3 is used to control the pin associated with channel AD3.
0 AD3 pin I/O control enabled
1 AD3 pin I/O control disabled
ADC Pin Control 2 — ADPC2 is used to control the pin associated with channel AD2.
0 AD2 pin I/O control enabled
1 AD2 pin I/O control disabled
ADPC7
7
0
ADICLK
00
01
10
11
ADPC6
0
6
Table 9-9. APCTL1 Register Field Descriptions
Figure 9-11. Pin Control 1 Register (APCTL1)
Bus clock
Bus clock divided by 2
Alternate clock (ALTCLK)
Asynchronous clock (ADACK)
MC9S08SH32 Series Data Sheet, Rev. 2
ADPC5
Table 9-8. Input Clock Select
0
5
PRELIMINARY
ADPC4
Selected Clock Source
0
4
Description
ADPC3
0
3
Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
ADPC2
0
2
ADPC1
0
1
ADPC0
0
0
133
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