MC908QY4ACDTER Freescale Semiconductor, MC908QY4ACDTER Datasheet - Page 58
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MC908QY4ACDTER
Manufacturer Part Number
MC908QY4ACDTER
Description
MCU 8BIT 4K FLASH W/ADC 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QT1ACDWE.pdf
(200 pages)
Specifications of MC908QY4ACDTER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- Current page: 58 of 200
- Download datasheet (2Mb)
Configuration Register (CONFIG)
IRQPUD — IRQ Pin Pullup Control Bit
IRQEN — IRQ Pin Function Selection Bit
OSCENINSTOP— Oscillator Enable in Stop Mode Bit
RSTEN — RST Pin Function Selection
COPRS (Out of Stop Mode) — COP Reset Period Selection Bit
COPRS (In Stop Mode) — Auto Wakeup Period Selection Bit, depends on OSCSTOPEN in
CONFIG2 and external clock source
LVISTOP — LVI Enable in Stop Mode Bit
LVIRSTD — LVI Reset Disable Bit
58
OSCENINSTOP, when set, will allow the clock source to continue to generate clocks in stop mode.
This function can be used to keep the auto-wakeup running while the rest of the microcontroller stops.
When clear, the clock source is disabled when the microcontroller enters stop mode.
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
LVIRSTD disables the reset signal from the LVI module.
1 = Internal pullup is disconnected
0 = Internal pullup is connected between IRQ pin and V
1 = Interrupt request function active in pin
0 = Interrupt request function inactive in pin
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode
1 = Reset function active in pin
0 = Reset function inactive in pin
1 = COP reset short cycle = 8176 × BUSCLKX4
0 = COP reset long cycle = 262,128 × BUSCLKX4
1 = Auto wakeup short cycle = 512 × (INTRCOSC or BUSCLKX2)
0 = Auto wakeup long cycle = 16,384 × (INTRCOSC or BUSCLKX2)
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets disabled
0 = LVI module resets enabled
Reset:
Read:
Write:
The RSTEN bit is cleared by a power-on reset (POR) only. Other resets will
leave this bit unaffected.
POR:
U = Unaffected
COPRS
Bit 7
0
0
Figure 5-2. Configuration Register 1 (CONFIG1)
LVISTOP
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
6
0
0
LVIRSTD
5
0
0
LVIPWRD
NOTE
4
0
0
LVITRIP
U
3
0
DD
SSREC
2
0
0
STOP
1
0
0
Freescale Semiconductor
COPD
Bit 0
0
0
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