MCHC908QT2MDWER Freescale Semiconductor, MCHC908QT2MDWER Datasheet - Page 29
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MCHC908QT2MDWER
Manufacturer Part Number
MCHC908QT2MDWER
Description
IC MCU 1.5K FLASH W/ADC 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MCHC908QT2MDWER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
5
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Processor Series
HC08QT
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Addr.
↓
TIM Counter Register Low
TIM Channel 0 Status and
TIM Channel 1 Status and
Oscillator Status Register
Control Register (TSC0)
Control Register (TSC1)
Register High (TMODH)
Oscillator Trim Register
Register High (TCH0H)
Register High (TCH1H)
Register Low (TMODL)
Register Low (TCH0L)
Register Low (TCH1L)
Register Name
TIM Counter Modulo
TIM Counter Modulo
Unimplemented
Unimplemented
TIM Channel 0
TIM Channel 0
TIM Channel 1
TIM Channel 1
See page 128.
See page 129.
See page 129.
See page 130.
See page 132.
See page 132.
See page 130.
See page 132.
See page 132.
See page 96.
See page 96.
(OSCSTAT)
(OSCTRIM)
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5)
(TCNTL)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
MC68HC908QY/QT Family Data Sheet, Rev. 6
TRIM7
CH0F
CH1F
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
R
0
1
1
0
0
0
0
0
1
= Unimplemented
CH0IE
CH1IE
TRIM6
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
Bit 6
R
6
0
1
1
0
0
0
0
TRIM5
MS0B
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
Bit 5
R
5
0
1
1
0
0
0
0
0
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
TRIM4
MS0A
MS1A
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
R
R
4
0
1
1
0
0
0
0
= Reserved
ELS0B
ELS1B
TRIM3
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
R
3
0
1
1
0
0
0
0
ELS0A
ELS1A
TRIM2
Bit 10
Bit 10
Bit 10
U = Unaffected
Bit 2
Bit 2
Bit 2
Bit 2
R
Input/Output (I/O) Section
2
0
1
1
0
0
0
0
ECGON
TRIM1
TOV0
TOV1
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
1
0
1
1
0
0
0
0
CH0MAX
CH1MAX
ECGST
TRIM0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
1
1
0
0
0
0
29
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