S9S08SG4E2VTG Freescale Semiconductor, S9S08SG4E2VTG Datasheet - Page 47
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S9S08SG4E2VTG
Manufacturer Part Number
S9S08SG4E2VTG
Description
MCU 4K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.S9S08SG4E2CSC.pdf
(316 pages)
Specifications of S9S08SG4E2VTG
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
16-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
On-chip Dac
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S08SG4E2VTG
Manufacturer:
Freescale Semiconductor
Quantity:
135
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4.5.1
Features of the FLASH memory include:
4.5.2
Before any program or erase command can be accepted, the FLASH clock divider register (FCDIV) must
be written to set the internal clock for the FLASH module to a frequency (f
200 kHz (see
once, so normally this write is done during reset initialization. FCDIV cannot be written if the access error
flag, FACCERR in FSTAT, is set. The user must ensure that FACCERR is not set before writing to the
FCDIV register. One period of the resulting clock (1/f
program and erase pulses. An integer number of these timing pulses are used by the command processor
to complete a program or erase command.
Table 4-5
of FCLK (f
of cycles of FCLK and as an absolute time for the case where t
shown include overhead for the command state machine and enabling and disabling of program and erase
voltages.
Freescale Semiconductor
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FLASH size
— MC9S08SG8: 8,192 bytes (16 pages of 512 bytes each)
— MC9S08SG4: 4,096 bytes (8 pages of 512 bytes each)
Single power supply program and erase
Command interface for fast program and erase operation
Up to 100,000 program/erase cycles at typical voltage and temperature
Flexible block protection
Security feature for FLASH and RAM
Auto power-down for low-frequency read accesses
shows program and erase times. The bus clock frequency and FCDIV determine the frequency
Program and Erase Times
FCLK
Features
Section 4.7.1, “FLASH Clock Divider Register
Byte program
Byte program (burst)
Page erase
Mass erase
1
). The time for one cycle of FCLK is t
Excluding start/end overhead
Parameter
MC9S08SG8 MCU Series Data Sheet, Rev. 6
Table 4-5. Program and Erase Times
Cycles of FCLK
20,000
4000
9
4
FCLK
FCLK
) is used by the command processor to time
= 1/f
(FCDIV)”). This register can be written only
FCLK
FCLK
Time if FCLK = 200 kHz
= 5 μs. Program and erase times
. The times are shown as a number
FCLK
100 ms
20 μs
20 ms
45 μs
) between 150 kHz and
1
Chapter 4 Memory
46
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