ST10F273M-4T3 STMicroelectronics, ST10F273M-4T3 Datasheet - Page 30

• Manufacturer Part Number: ST10F273M-4T3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Internal Flash memory
Note:
5.2.3
Note:
5.3
Note:
Caution:
30/182
Table 6.
FVWPIR-mirror is a mirror of the FVWPIR to maintain software compatibility with the
ST10F273E in the handling of the last two blocks B0F10/B1F0 and B0F11/B1F1.
XFICR is a dummy register that can be read and written (for compatibility with the
ST10F273E) but its content has no effect on the XBus timings.
Low power mode
The Flash module is automatically switched off executing PWRDN instruction. The
consumption is drastically reduced, but exiting this state can require a long time (t
Recovery time from Power-down mode for the Flash modules is anyway shorter than the
main oscillator start-up time. To avoid any problem in restarting to fetch code from the Flash,
it is important to size properly the external circuit on RPD pin.
PWRDN instruction must not be executed while a Flash program/erase operation is in
progress.
Write operation
The Flash module has a single register interface mapped in the XBus memory space
0x0E 0000 - 0x0E 0015. All the operations are enabled through four 16-bit control registers:
Flash Control Register 1-0 High/Low (FCR1H/L-FCR0H/L). Eight other 16-bit registers are
used to store Flash Address and Data for Program operations (FARH/L and FDR1H/L-
FDR0H/L) and Write Operation Error flags (FER). All registers are accessible with 8- and
16-bit instructions (since they are mapped on the XBus).
To have access to the Flash Control Registers used for program/erasing operations,
bit 5 (XFLASHEN) in XPERCON register must be set.
During a Flash write operation any attempt to read the IFlash will output the invalid data
009Bh (corresponding, for code fetch, to the software trap 009Bh). This means that the
FCR1 - 0
FDR1 - 0
FAR
FER
FVWPIR-mirror
FVWPIR
FVAPR0
FVAPR1
XFICR
Name
Flash control registers summary
Flash control registers 1 - 0 High &
Low
Flash data registers 1 - 0 High &
Low
Flash address registers
Flash error register
Flash non-volatile protection I
registers mirrored
Flash volatile protection I registers 0x0E DFB4 - 0x0E DFB7
Flash volatile access protection
register 0
Flash non-volatile access
protection register 1
XFlash Interface Control register
(dummy register)
Description
0x0E 0000 - 0x0E 0007
0x0E 0008 - 0x0E 000F
0x0E 0010 - 0x0E 0013
0x0E 0014 - 0x0E 0015
0x0E DFB0 - 0x0E DFB3
0x0E DFB8 - 0x0E DFB9
0x0E DFBC - 0x0E DFBF
0x0E E000 - 0x0E E001
Addresses
8 byte
8 byte
4 byte
2 byte
4 byte
4 byte
2 byte
4 byte
2 byte
Size
ST10F273M
PD
Bus size
(XBus)
).
16-bit