ST10F276-4T3 STMicroelectronics, ST10F276-4T3 Datasheet - Page 121
ST10F276-4T3
Manufacturer Part Number
ST10F276-4T3
Description
MCU 16BIT 832K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F276-4TR3.pdf
(231 pages)
Specifications of ST10F276-4T3
Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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ST10F276E
19.7
Figure 36. SW / WDT bidirectional RESET (EA = 0) followed by a HW RESET
Reset circuitry
Internal reset circuitry is described in
resistor of 50kΩ to 250kΩ (The minimum reset time must be calculated using the lowest
value).
It also provides a programmable (BDRSTEN bit of SYSCON register) pull-down to output
internal reset state signal (synchronous reset, watchdog timer reset or software reset).
This bidirectional reset function is useful in applications where external devices require a
reset signal but cannot be connected to RSTOUT pin.
This is the case of an external memory running codes before EINIT (end of initialization)
instruction is executed. RSTOUT pin is pulled high only when EINIT is executed.
The RPD pin provides an internal weak pull-down resistor which discharges external
capacitor at a typical rate of 200µA. If bit PWDCFG of SYSCON register is set, an internal
pull-up resistor is activated at the end of the reset sequence. This pull-up will charge any
capacitor connected on RPD pin.
The simplest way to reset the ST10F276E is to insert a capacitor C1 between RSTIN pin
and V
RPD pin and V
50kΩ to 250kΩ (the minimum reset time must be determined by the lowest value). Select C1
that produce a sufficient discharge time to permit the internal or external oscillator and / or
internal PLL and the on-chip voltage regulator to stabilize.
SS
RSTIN
P0[7:2]
RSTOUT
RSTF
(After Filter)
P0[15:13]
P0[12:8]
P0[1:0]
ALE
RST
, and a capacitor between RPD pin and V
DD
. The input RSTIN provides an internal pull-up device equalling a resistor of
≤ 500 ns
≥ 50 ns
Figure
not transparent
not transparent
not transparent
1024 TCL
transparent
39. The RSTIN pin provides an internal pull-up
SS
(C0) with a pull-up resistor R0 between
At this time RSTF is sampled LOW
so HW Reset is entered
not t.
not t.
≤ 500 ns
8 TCL
≥ 50 ns
System reset
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