STR912FAZ44H6 STMicroelectronics, STR912FAZ44H6 Datasheet - Page 63

MCU 512KB FLASH 96K RAM 144LFBGA

STR912FAZ44H6

Manufacturer Part Number
STR912FAZ44H6
Description
MCU 512KB FLASH 96K RAM 144LFBGA
Manufacturer
STMicroelectronics
Series
STR9r
Datasheet

Specifications of STR912FAZ44H6

Core Processor
ARM9
Core Size
32-Bit
Speed
96MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
STR912x
Core
ARM966E-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
96 KB
Interface Type
CAN, I2C, IrDA, SSP, UART, USB
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
80
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MCBSTR9, MCBSTR9U, MCBSTR9UME, KSDK-STR912-PLUS, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
STR9-COMSTICK, STR910-EVAL, STR91X-SK/HIT, STR91X-SK/IAR, STR91X-SK/KEI, STR91X-SK/RAI, STR9-DK/RAIS, STR91X-DK/IAR, STX-PRO/RAIS, STR912-D/RAIS, STR79-RVDK/CPP, STR79-RVDKCPP/9, STR79-RVDK, STR79-RVDK/9, STR9-RVDK/BAS, STR79-RVDK/UPG
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
497-8267 - BOARD EVAL BASED ON STR9497-8262 - BOARD EVAL BASED ON STR912FAMCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2MCBSTR9 - BOARD EVAL STM STR9 SERIES497-5067 - BOARD EVAL FOR STR910 FAMILY497-5066 - KIT STARTER KEIL FOR STR910497-5065 - KIT STARTER IAR KICKSTART STR912497-5064 - KIT STARTER FOR STR910 FAMILY497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-6286

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0
STR91xFAxxx
7.5.1
LVD delay timing
Case 1: When V
(introduced by the VDD rising edge), a new ~10 ms delay starts before the release of
RESET_OUTn. See
Figure 12. LVD reset delay case 1
Case 2: When V
(introduced by the VDD rising edge), RESET_OUTn will be released immediately at the end
of the delay. No new delay is introduced in this case. See
Figure 13. LVD reset delay case 2
Case 3: When V
RESET_OUTn will be released at the end of a ~10 ms delay. See
Figure 14. LVD reset delay case 3
V
V
RESET_OUTn (blue)
V
V
V
V
RESET_OUTn (blue)
RESET_OUTn (blue)
DD
DDQ
DD
DDQ
DD
DDQ
(green)
(green)
(green)
(red)
(red)
(red)
V
DDQ
DDQ
DD
V
DD_LVD+
DD_LVD+
reaches the V
Figure 12.
reaches the V
reaches the V
V
V
~10 ms delay
DDQ_LVD+
DDQ_LVD+
~10 ms delay
Doc ID 13495 Rev 6
DD_LVD+
DDQ_LVD+
DDQ_LVD+
V
DD_LVD+
threshold after the V
threshold after the first ~10 ms delay
threshold before the first ~10 ms delay
~10 ms delay
Figure 13.
V
DDQ_LVD+
DDQ
Electrical characteristics
Figure 14
rising edge,
~10 ms delay
63/102

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