STM32F102RBT6 STMicroelectronics, STM32F102RBT6 Datasheet - Page 11

• Manufacturer Part Number: STM32F102RBT6
• Description: MCU ARM 32BIT 128KB FLASH 64LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F102RBT6

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: 497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-8312

STM32F102x8, STM32F102xB
Figure 2.
1. For the USB function to be available, both HSE and PLL must be enabled, with the CPU running at
2. To have an ADC conversion time of 1.2 µs, APB2 must be at 12 MHz, 24 MHz or 48 MHz.
OSC32_OUT
48 MHz.
OSC32_IN
OSC_OUT
OSC_IN
MCO
Clock tree
4-16 MHz
32.768 kHz
HSE OSC
Main
Clock Output
LSE OSC
HSI RC
8 MHz
LSI RC
40 kHz
PLLSRC
MCO
x2, x3, x4
PLLMUL
HSI
..., x16
PLLXTPRE
PLL
/2
/128
LSE
LSI
/2
RTCSEL[1:0]
/2
Doc ID 15056 Rev 3
HSE
PLLCLK
SYSCLK
HSI
PLLCLK
RTCCLK
to Independent Watchdog (IWDG)
HSI
HSE
CSS
SW
SYSCLK
48 MHz
to RTC
max
IWDGCLK
Prescaler
/1, 2..512
AHB
Prescaler
/1, 1.5
USB
/1, 2, 4, 8, 16
/1, 2, 4, 8, 16
TIM2,3, 4
If (APB1 prescaler =1) x1
else
/8
Prescaler
Prescaler
48 MHz max
APB1
APB2
Clock
Enable (3 bits)
48 MHz
Legend:
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
48 MHz max
24 MHz max
Peripheral Clock
Peripheral Clock
Enable (13 bits)
Enable (11 bits)
Prescaler
/2, 4, 6, 8
USBCLK
to USB interface
x2
ADC
HCLK
to AHB bus, core,
memory and DMA
FCLK Cortex
free running clock
to Cortex System timer
Peripheral Clock
Enable (3 bits)
Description
TIMXCLK
PCLK1
PCLK2
to APB1
peripherals
to APB2
peripherals
ADCCLK
to TIM2, 3
and 4
ai14994
to ADC
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