Z86E7216PSG Zilog, Z86E7216PSG Datasheet - Page 61
Z86E7216PSG
Manufacturer Part Number
Z86E7216PSG
Description
IC 16K OTP ZIRC 40-DIP
Manufacturer
Zilog
Series
Z8®r
Datasheet
1.Z86E7216PSC.pdf
(102 pages)
Specifications of Z86E7216PSG
Core Processor
Z8
Core Size
8-Bit
Speed
16MHz
Peripherals
LVD, POR, WDT
Number Of I /o
31
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
748 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.620", 15.75mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
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PS008704-0507
T8 Demodulation Mode
You need to program TC8L and TC8H to FFh. After T8 is enabled, when the first
edge (rising, falling, or both depending on CTR1 D5, D4) is detected, it starts to
count down. When a subsequent edge (rising, falling, or both depending on CTR1
D5, D4) is detected during counting, the current value of T8 is one's comple-
mented and put into one of the capture registers. If it is a positive edge, data is put
into LO8; if negative edge, HI8. One of the edge-detect status bits (CTR1 D1, D0)
is set, and an interrupt can be generated if enabled (CTR0 D2). Meanwhile, T8 is
loaded with FFh and starts counting again. When T8 reaches 0, the time-out sta-
tus bit (CTR0 D5) is set, an interrupt can be generated if enabled (CTR0 D1), and
T8 continues counting from FFh (see
Pos
T8
→
LO8
No
No
Count Capture
(Set by User)
T8_Enable
FFh
Yes
Yes
What Kind
T8 (8-Bit)
Present
of Edge
Edge
→
T8
Figure 30
T8
→
and
HI8
Neg
Figure
31).
OTP Microcontroller
57
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