ST7FMC2M9T6 STMicroelectronics, ST7FMC2M9T6 Datasheet - Page 151

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ST7FMC2M9T6

Manufacturer Part Number
ST7FMC2M9T6
Description
MCU 8BIT 60K FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FMC2M9T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
60
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Processor Series
ST7FMC2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
60
Number Of Timers
5
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4867

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FMC2M9T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST7FMC2M9T6
Manufacturer:
ST
0
MOTOR CONTROLLER (Cont’d)
10.6.6.4 Z Event Detection
In sensorless mode, the Z window filter becomes
active after each D event. It blanks out the Z event
during the time window defined by the ZWF[3:0]
bits in the MZFR register (see
value is 200µs. This Window Filter becomes active
after both hardware and software D events.
The Z Event Filter becomes active after the Z Win-
dow Filter. It counts the number of consecutive Z
events up to a limit defined by the ZEF[3:0] bits in
the MZFR register. The reset value is 1. The Z bit
is set when the counter limit is reached.
Sampling is done at a selectable frequency
(f
The Z event filter is active only for a hardware Z
event (Z
to 1. Z event filter is also active in sensor mode.
Figure 80. Z Window and Event Filter Flowchart
SCF
), see
Reset counter
H
). For a simulated (Z
Table
No
No
No
Increment counter
Counter=Limit?
82.
Set the Z bit
Sampling
Yes
Blanking
Window
End of
Event
Z
?
D
?
Yes
No
Table
S
) event, it is forced
WINDOW
28). The reset
FILTER
FILTER
EVENT
Yes
Limit=1?
Yes
Table 28. Z Window filter Setting
Note: Times are indicated for 4 MHz f
Table 29. Z Event filter Setting
ZWF3 ZWF2 ZWF1 ZWF0
ZEF3 ZEF2 ZEF1 ZEF0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ST7MC1xx/ST7MC2xx
D to Z window fil-
ter in Sensorless
Mode (SR=0)
100 µs
120 µs
140 µs
160 µs
180 µs
200 µs
10 µs
15 µs
20 µs
25 µs
30 µs
35 µs
40 µs
60 µs
80 µs
Z event Limit
5 µs
10
11
12
13
14
15
16
PERIPH
1
2
3
4
5
6
7
8
9
151/309
SR=1
event
Filter
Win-
after
dow
No
D
1

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