EZ80F92AZ020EC00TR Zilog, EZ80F92AZ020EC00TR Datasheet - Page 77
EZ80F92AZ020EC00TR
Manufacturer Part Number
EZ80F92AZ020EC00TR
Description
IC ACCLAIM MCU 128KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F92AZ020EC00TR
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
EZ80F92AZ020EC00T
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Table 25. Chip Select x Bus Mode Control Register(CS0_BMC = 00F0h, CS1_BMC = 00F1h,
PS015313-0508
Chip Select x Bus Mode Control Register+The Chip Select Bus Mode register,
listed in
modes. Changing the bus mode allows the eZ80F92 device to interface to peripherals
based on the Z80-, Intel-, or Motorola-style asynchronous bus interfaces. When a bus
mode other than CPU is programmed for a particular Chip Select, the CSx_WAIT setting
in that Chip Select Control Register is ignored.
CS2_BMC = 00F2h, CS3_BMC = 00F3h)
Bit
CS0_BMC Reset
CS1_BMC Reset
CS2_BMC Reset
CS3_BMC Reset
CPU Access
Note: R/W = Read/Write; R = Read Only.
Bit
Position
[7:6]
BUS_MODE
5
AD_MUX
4
Table
25, configures the Chip Select for eZ80
Value Description
00
01
10
11
0
1
0
R/W
eZ80
Z80 bus mode.
Intel
Motorola bus mode.
Separate address and data.
Multiplexed address and data—appears on data bus
DATA[7:0].
Reserved.
7
0
0
0
0
TM
®
bus mode.
bus mode.
R/W
6
0
0
0
0
R/W
5
0
0
0
0
R
4
0
0
0
0
®
, Z80
R/W
®
3
0
0
0
0
, Intel
Chip Selects and Wait States
Product Specification
R/W
TM
2
0
0
0
0
eZ80F92/eZ80F93
, or Motorola bus
R/W
1
1
1
1
1
R/W
0
0
0
0
0
70
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