EZ80F93AZ020SC00TR Zilog, EZ80F93AZ020SC00TR Datasheet - Page 17
EZ80F93AZ020SC00TR
Manufacturer Part Number
EZ80F93AZ020SC00TR
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F93AZ020SC00TR
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
EZ80F93AZ020SC00T
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Table 1. 100-Pin LQFP Pin Identification of the eZ80F92 Device (Continued)
PS015313-0508
Pin No Symbol
33
34
35
36
37
38
39
40
41
42
43
44
V
V
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
V
V
DD
SS
DD
SS
Function
Power Supply
Ground
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Power Supply
Ground
Signal Direction
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Description
Power Supply.
Ground.
The data bus transfers data to and from I/O
and memory devices. The eZ80Acclaim!
drives these lines only during Write cycles
when the CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives these
lines only during Write cycles when the
CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives these
lines only during Write cycles when the
CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives these
lines only during Write cycles when the
CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives these
lines only during Write cycles when the
CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives these
lines only during Write cycles when the
CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives these
lines only during Write cycles when the
CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives these
lines only during Write cycles when the
CPU is the bus master.
Power Supply.
Ground.
Product Specification
Architectural Overview
®
10
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