ST72F63BH2T1 STMicroelectronics, ST72F63BH2T1 Datasheet - Page 89
ST72F63BH2T1
Manufacturer Part Number
ST72F63BH2T1
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F63BD6U1TR.pdf
(186 pages)
Specifications of ST72F63BH2T1
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
27
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST7MDTULS-EVAL, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel / 8 bit, 12 Channel
For Use With
497-5521 - EVAL BOARD LOW SPEED USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F63BH2T1
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST7263Bxx
11.3.5
11.3.6
Figure 43. Bit sampling in reception mode
Low power modes
Table 27.
Interrupts
Table 28.
The SCI interrupt events are connected to the same interrupt vector.
These events generate an interrupt if the corresponding Enable Control Bit is set and the
interrupt mask in the CC register is reset (RIM instruction).
RDI LINE
Transmit Data register Empty
Transmission Complete
Received Data Ready to be Read
Overrun Error Detected
Idle Line Detected
Parity Error
Sample
clock
Mode
WAIT
HALT
Interrupt event
Low power modes
Interrupts
1
2
No effect on SCI.
SCI interrupts cause the device to exit from Wait mode.
SCI registers are frozen.
In Halt mode, the SCI stops transmitting/receiving until Halt mode is
exited.
3
4
7/16
5
Doc ID 7516 Rev 8
6
One bit time
7
TC
TDRE
RDRF
OR
IDLE
PE
Event flag
sampled values
8
9
Description
10
TCIE
TIE
RIE
ILIE
PIE
11
Control
Enable
bit
12
6/16
7/16
13
Yes
Yes
Yes
Yes
Yes
Yes
14
from
Wait
On-chip peripherals
Exit
15
16
No
No
No
No
No
No
from
Halt
Exit
89/186
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