ST7FLITE39M6TR STMicroelectronics, ST7FLITE39M6TR Datasheet - Page 90
![IC MCU 8BIT 8K FLASH 20SOIC](/photos/6/56/65691/497-20-soic__7_5mm_width__series_sml.jpg)
ST7FLITE39M6TR
Manufacturer Part Number
ST7FLITE39M6TR
Description
IC MCU 8BIT 8K FLASH 20SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE39M6TR
Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLITE3x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-8403 - BOARD DEMO STCC08 AC SW DETECTOR497-6398 - BOARD EVAL ST7FLITE39/STM1403497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FLITE39M6TR
Manufacturer:
IDT
Quantity:
2 799
Part Number:
ST7FLITE39M6TR
Manufacturer:
ST
Quantity:
20 000
ST7LITE3xF2
11.5 LINSCI SERIAL COMMUNICATION INTERFACE (LIN MASTER/SLAVE)
11.5.1 Introduction
The Serial Communications Interface (SCI) offers
a flexible means of full-duplex data exchange with
external equipment requiring an industry standard
NRZ asynchronous serial data format. The SCI of-
fers a very wide range of baud rates using two
baud rate generator systems.
The LIN-dedicated features support the LIN (Local
Interconnect Network) protocol for both master
and slave nodes.
This chapter is divided into SCI Mode and LIN
mode sections. For information on general SCI
communications, refer to the SCI mode section.
For LIN applications, refer to both the SCI mode
and LIN mode sections.
11.5.2 SCI Features
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– Address bit (MSB)
– Idle line
Full duplex, asynchronous communications
NRZ standard format (Mark/Space)
Independently programmable transmit and
receive baud rates up to 500K baud
Programmable data word length (8 or 9 bits)
Receive buffer full, Transmit buffer empty and
End of Transmission flags
2 receiver wake-up modes:
Muting function for multiprocessor configurations
Separate enable bits for Transmitter and
Receiver
Overrun, Noise and Frame error detection
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11.5.3 LIN Features
– LIN Master
– LIN Slave
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error
– Parity interrupt
– Transmits parity bit
– Checks parity of received data byte
– 13-bit LIN Synch Break generation
– Automatic Header Handling
– Automatic baud rate resynchronization based
– Automatic baud rate adjustment (at CPU fre-
– 11-bit LIN Synch Break detection capability
– LIN Parity check on the LIN Identifier Field
– LIN Error management
– LIN Header Timeout
– Hot plugging support
6 interrupt sources
Parity control:
Reduced power consumption mode
on recognition and measurement of the LIN
Synch Field (for LIN slave nodes)
quency precision)
(only in reception)