ST7FLITE39F2M6 STMicroelectronics, ST7FLITE39F2M6 Datasheet - Page 65

• Manufacturer Part Number: ST7FLITE39F2M6
• Description: IC MCU 8BIT 8K FLASH 20SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE39F2M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7FLITE3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: LINSCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• For Use With: 497-8406 - BOARD STF20NM50FD/STF7LITE39BF2497-8403 - BOARD DEMO STCC08 AC SW DETECTOR497-6398 - BOARD EVAL ST7FLITE39/STM1403497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5514 - EVAL BOARD THERMO CONTROL REFRIG497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5641-5; STFLITE39F2M6

DUAL 12-BIT AUTORELOAD TIMER 3 (Cont’d)
– At the second input capture on the falling edge of
Figure 45. Long Range Input Capture Timing Diagram
11.2.4 Low Power Modes
Mode
SLOW
WAIT
ACTIVE-
HALT
HALT
the pulse, we assume that the values in the reg-
isters are as follows:
LTICR = LT2
ATICRH = ATH2
f
TB Counter1
CNTR1
LTIC
LTICR
ATICRH
ATICRL
OSC/32
The input frequency is divided by 32
Description
No effect on AT timer
AT timer halted except if CK0=1,
CK1=0 and OVFIE=1
AT timer halted.
_ _ _
F9h
00h
00h
0h
00h
LT1
ATH1 & ATL1
F9h
00h
Now pulse width P between first capture and sec-
ond capture will be:
P = decimal (F9 – LT1 + LT2 + 1) * 0.004ms + dec-
imal (ATICR2 - ATICR1 – 1) * 1ms
ATH1
LT1
ATL1
ATICRL = ATL2
Hence ATICR2 [11:0] = ATH2 & ATL2
_ _ _
_ _ _
ATICR = ATICRH[3:0] & ATICRL[7:0]
_ _ _
_ _ _
LT2
_ _ _
ATH2 & ATL2
ATH2
ATL2
LT2
ST7LITE3xF2
_ _ _
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