ST7FLITE20F1B6 STMicroelectronics, ST7FLITE20F1B6 Datasheet - Page 51

IC MCU 8BIT 8K FLASH 20-DIP

ST7FLITE20F1B6

Manufacturer Part Number
ST7FLITE20F1B6
Description
IC MCU 8BIT 8K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheets

Specifications of ST7FLITE20F1B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5517 - EVAL BOARD 1PHASE ENERGY METER497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
I/O PORTS (Cont’d)
10.7 DEVICE-SPECIFIC I/O PORT CONFIGURATION
The I/O port register configurations are summa-
rised as follows.
Standard Ports
PA7:0, PB6:0
Table 10. Port Configuration (Standard ports)
Note: On ports where the external interrupt capability is selected using the EISR register, the configura-
tion will be as follows:
Table 11. I/O Port Register Map and Reset Values
floating input
pull-up input
open drain output
push-pull output
Address
(Hex.)
0000h
0001h
0002h
0003h
0004h
0005h
Port A
Port B
Port A
Port B
Port
Port
PADR
Reset Value
PADDR
Reset Value
PAOR
Reset Value
PBDR
Reset Value
PBDDR
Reset Value
PBOR
Reset Value
MODE
Register
Label
PA7:0
PB6:0
PA7:0
PB6:0
Pin name
Pin name
MSB
MSB
MSB
MSB
MSB
MSB
7
1
0
0
1
0
0
DDR
0
0
1
1
OR = 0
OR = 0
floating
floating
floating
floating
6
1
0
1
1
0
0
OR
0
1
0
1
Input
Input
5
1
0
0
1
0
0
pull-up interrupt
pull-up interrupt
Interrupt Ports
Ports where the external interrupt capability is
selected using the EISR register
floating input
pull-up interrupt input
open drain output
push-pull output
OR = 1
OR = 1
pull-up
pull-up
4
1
0
0
1
0
0
MODE
3
1
0
0
1
0
0
open drain
open drain
open drain
open drain
OR = 0
OR = 0
2
1
0
0
1
0
0
Output
Output
1
1
0
0
1
0
0
DDR
0
0
1
1
push-pull
push-pull
push-pull
push-pull
OR = 1
OR = 1
ST7LITE2
LSB
LSB
LSB
LSB
LSB
LSB
51/133
OR
0
1
0
0
1
0
0
0
1
0
1
1

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