ST7FLIT15BF0M6TR STMicroelectronics, ST7FLIT15BF0M6TR Datasheet - Page 37
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ST7FLIT15BF0M6TR
Manufacturer Part Number
ST7FLIT15BF0M6TR
Description
IC MCU 8BIT 2K FLASH 20SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLIT15BY1M6.pdf
(159 pages)
Specifications of ST7FLIT15BF0M6TR
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLIT1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 37 of 159
- Download datasheet (3Mb)
INTERRUPTS (cont’d)
Figure 21. Interrupt Processing Flowchart
Table 5. Interrupt Mapping
Note 1: This interrupt exits the MCU from “Auto Wake-up from Halt” mode only.
Note 2 : These interrupts exit the MCU from “ACTIVE-HALT” mode only.
N°
10
11
12
13
0
1
2
3
4
5
6
7
8
9
FROM RESET
LITE TIMER LITE TIMER RTC2 interrupt
LITE TIMER
Comparator Comparator Interrupt
AT TIMER
AT TIMER
Source
RESET
Block
TRAP
AWU
SPI
ei0
ei1
ei2
ei3
SI
Reset
Software Interrupt
Auto Wake Up Interrupt
External Interrupt 0
External Interrupt 1
External Interrupt 2
External Interrupt 3
AVD interrupt
AT TIMER Output Compare Interrupt
or Input Capture Interrupt
AT TIMER Overflow Interrupt
LITE TIMER Input Capture Interrupt
LITE TIMER RTC1 Interrupt
SPI Peripheral Interrupts
AT TIMER Overflow Interrupt
EXECUTE INSTRUCTION
Description
RESTORE PC, X, A, CC FROM STACK
THIS CLEARS I BIT BY DEFAULT
FETCH NEXT INSTRUCTION
N
I BIT SET?
IRET?
Y
Y
PWMxCSR
AWUCSR
or ATCSR
Register
ATCSR2
LTCSR2
SPICSR
CMPCR
ATCSR
LTCSR
LTCSR
SICSR
Label
N/A
N/A
N
LOAD PC FROM INTERRUPT VECTOR
Priority
Highest
Lowest
Priority
Priority
Order
N
STACK PC, X, A, CC
INTERRUPT
HALT or
PENDING?
AWUFH
SET I BIT
yes
yes
yes
from
Exit
yes
yes
yes
no
no
no
no
no
no
no
1)
2)
2)
Y
FFECh-FFEDh
FFEAh-FFEBh
ST7LITE1xB
FFFCh-FFFDh
FFFAh-FFFBh
FFEEh-FFEFh
FFFEh-FFFFh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF8h-FFF9h
FFF0h-FFF1h
Address
Vector
37/159
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