Z8F012ASB020SG Zilog, Z8F012ASB020SG Datasheet - Page 143

• Manufacturer Part Number: Z8F012ASB020SG
• Description: IC ENCORE XP MCU FLASH 1K 8SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F012ASB020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: Z8F012Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4039; Z8F012ASB020SG

Table 72. ADC Control/Status Register 1 (ADCCTL1)
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
ADC Control/Status Register 1
ADC Data High Byte Register
REFSELH
R/W
7
1
The ADC Control/Status Register 1 (ADCCTL1) configures the input buffer stage,
enables the threshold interrupts and contains the status of both threshold triggers. It is also
used to select the voltage reference configuration.
REFSELH—Voltage Reference Level Select High Bit; in conjunction with the Low bit
(REFSELL) in
reference; the following details the effects of {REFSELH, REFSELL}; this reference is
independent of the Comparator reference.
00= Internal Reference Disabled, reference comes from external pin
01= Internal Reference set to 1.0 V
10= Internal Reference set to 2.0 V (default)
11= Reserved
BUFMODE[2:0]
000 = Single-ended, unbuffered input
001 = Single-ended, buffered input with unity gain
010 = Reserved
011 = Reserved
100 = Differential, unbuffered input
101 = Differential, buffered input with unity gain
110 = Reserved
111 = Reserved
The ADC Data High Byte (ADCD_H) register contains the upper eight bits of the ADC
output. The output is an 13-bit two’s complement value. During a single-shot conversion,
this value is invalid. Access to the ADC Data High Byte register is read-only. Reading the
ADC Data High Byte register latches data in the ADC Low Bits register.
R/W
6
0
ADC Control Register
-
Input Buffer Mode Select
R/W
5
0
Reserved
R/W
4
0
0, this determines the level of the internal voltage
F71H
R/W
3
0
Z8 Encore! XP
R/W
2
0
Product Specification
BUFMODE[2:0]
Analog-to-Digital Converter
R/W
1
0
®
F082A Series
R/W
0
0
132