Z86E0208HSG1925 Zilog, Z86E0208HSG1925 Datasheet - Page 29

• Manufacturer Part Number: Z86E0208HSG1925
• Description: IC Z8 .5K OTP 8MHZ 20-SSOP
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E0208HSG1925

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: POR, WDT
• Number Of I /o: 14
• Program Memory Size: 512B (512 x 8)
• Program Memory Type: OTP
• Ram Size: 61 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Processor Series: Z86E02x
• Core: Z8
• Data Bus Width: 8 bit
• Data Ram Size: 61 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 1
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3946; Z86E0208HSG1925

STANDARD Mode
PS014802-0903
Note:
Recommendations for dampening voltage surges in both test and OTP mode
include the following:
•
•
XTAL1, XTAL2. Crystal In, Crystal Out (time-based input and output, respec-
tively). These pins connect an external parallel-resonant crystal, resonator, RC,
LC, or an external single-phase clock (8 MHz max) to the on-chip clock oscillator
and buffer.
Port 0, P02–P00. Port 0 is a 3-bit bidirectional, Schmitt-triggered CMOS-compati-
ble I/O port. These three I/O lines can be globally configured under software con-
trol to be inputs or outputs (Figure 9).
Auto Latch. The Auto Latch places valid CMOS levels on all CMOS inputs
(except P33, P32, P31) that are not externally driven. A valid CMOS level, rather
than a floating node, reduces excessive supply current flow in the input buffer. On
Power-up and Reset, the Auto Latch sets the ports to an undetermined state of 0
or 1. The default condition is AUTO LATCH ENABLED. The Auto Latch can be
disabled by programming the AUTO LATCH DISABLE option bit.
Using a clamping diode to V
Adding a capacitor to the affected pin.
Programming the EPROM/Test Mode Disable option prevents
accidental entry into EPROM Mode or Test Mode.
CC
.
General-Purpose OTP MCU with 14 I/O Lines
Z86E02 SL 1925
23