ST7FLITES2Y0M6 STMicroelectronics, ST7FLITES2Y0M6 Datasheet - Page 121
![MCU 8BIT 1K FLASH 16SOIC](/photos/1/39/13919/497-16-soic_series_sml.jpg)
ST7FLITES2Y0M6
Manufacturer Part Number
ST7FLITES2Y0M6
Description
MCU 8BIT 1K FLASH 16SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITES2Y0B6.pdf
(124 pages)
Specifications of ST7FLITES2Y0M6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Controller Family/series
ST7
No. Of I/o's
13
Ram Memory Size
128Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SPI
No. Of Pwm Channels
1
Rohs Compliant
Yes
Processor Series
ST7FLITESx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLIT0-IND/USB, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
In Transition
Other names
497-4861
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
16 KNOWN LIMITATIONS
16.1 Execution of BTJX Instruction
Description
Executing a BTJx instruction jumps to a random
address in the following conditions: the jump goes
to a lower address (jump backward) and the test is
performed on a data located at the address
00FFh.
16.2
previously
Watchdog option
Description
In-Circuit Programming of devices configured with
Hardware Watchdog (WDGSW bit in option byte 1
programmed to 0) requires certain precautions
(see below).
In-Circuit Programming uses ICC mode. In this
mode, the Hardware Watchdog is not automatical-
ly deactivated as one might expect. As a conse-
quence, internal resets are generated every 2 ms
by the watchdog, thus preventing programming.
The device factory configuration is Software
Watchdog so this issue is not seen with devices
that are programmed for the first time. For the
same reason, devices programmed by the user
with the Software Watchdog option are not impact-
ed.
The only devices impacted are those that have
previously been programmed with the Hardware
Watchdog option.
Workaround
Devices configured with Hardware Watchdog
must be programmed using a specific program-
ming mode that ignores the option byte settings. In
this mode, an external clock, normally provided by
the programming tool, has to be used. In ST tools,
this mode is called "ICP OPTIONS DISABLED".
Sockets on ST programming tools (such as
ST7MDT10-EPB) are controlled using "ICP OP-
TIONS DISABLED" mode. Devices can therefore
be reprogrammed by plugging them in the ST Pro-
gramming Board socket, whatever the watchdog
configuration.
When using third-party tools, please refer the
manufacturer's documentation to check how to ac-
cess specific programming modes. If a tool does
not have a mode that ignores the option byte set-
In-Circuit
programmed
Programming
with
of
Hardware
devices
tings, devices programmed with the Hardware
watchdog option cannot be reprogrammed using
this tool.
16.3 In-Circuit Debugging with Hardware
Watchdog
In Circuit Debugging is impacted in the same way
as In Circuit Programming by the activation of the
hardware watchdog in ICC mode. Please refer to
Section
16.4 Recommendations when LVD is enabled
When the LVD is enabled, it is recommended not
to connect a pull-up resistor or capacitor. A 10nF
pull-down capacitor is required to filter noise on
the reset line.
16.5
Interrupt Routine
When an active interrupt request occurs at the
same time as the related flag or interrupt mask is
being cleared, the CC register may be corrupted.
Concurrent interrupt context
The symptom does not occur when the interrupts
are handled normally, i.e. when:
– The interrupt request is cleared (flag reset or in-
– The interrupt request is cleared (flag reset or in-
– The interrupt request is cleared (flag reset or in-
If these conditions are not met, the symptom can
be avoided by implementing the following se-
quence:
Perform SIM and RIM operation before and after
resetting an active interrupt request
SIM
reset flag or interrupt mask
RIM
Ex:
terrupt mask) within its own interrupt routine
terrupt mask) within any interrupt routine
terrupt mask) in any part of the code while this in-
terrupt is disabled
Clearing
16.2.
ST7LITE0xY0, ST7LITESxY0
Active
Interrupts
Outside
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