LPC2194HBD64/01,15 NXP Semiconductors, LPC2194HBD64/01,15 Datasheet - Page 11

• Manufacturer Part Number: LPC2194HBD64/01,15
• Description: IC ARM7 MCU FLASH 256K 64-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2194HBD64/01,15

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 64-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 46
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: LPC21
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SPI/UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4316; 935284881151; LPC2194HBD64/01-S; LPC2194HBD64/01-S

NXP Semiconductors
LPC2194_5
Product data sheet
6.5 Interrupt controller
The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and
categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and
non-vectored IRQ as defined by programmable settings. The programmable assignment
scheme means that priorities of interrupts from the various peripherals can be dynamically
assigned and adjusted.
FIQ has the highest priority. If more than one request is assigned to FIQ, the VIC
combines the requests to produce the FIQ signal to the ARM processor. The fastest
possible FIQ latency is achieved when only one request is classified as FIQ, because then
the FIQ service routine can simply start dealing with that device. But if more than one
request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC
that identifies which FIQ source(s) is (are) requesting an interrupt.
Fig 3. LPC2194 memory map
3.75 GB
4.0 GB
3.5 GB
3.0 GB
2.0 GB
1.0 GB
0.0 GB
Rev. 05 — 10 December 2007
BOOT BLOCK (RE-MAPPED FROM
256 kB ON-CHIP FLASH MEMORY
RESERVED ADDRESS SPACE
RESERVED ADDRESS SPACE
RESERVED ADDRESS SPACE
16 kB ON-CHIP STATIC RAM
ON-CHIP FLASH MEMORY)
AHB PERIPHERALS
APB PERIPHERALS
Single-chip 16/32-bit microcontroller
0xFFFF FFFF
0xF000 0000
0xEFFF FFFF
0xE000 0000
0xDFFF FFFF
0xC000 0000
0x8000 0000
0x7FFF FFFF
0x7FFF E000
0x7FFF DFFF
0x4000 4000
0x4000 3FFF
0x4000 0000
0x3FFF FFFF
0x0004 0000
0x0003 FFFF
0x0000 0000
002aad180
LPC2194
© NXP B.V. 2007. All rights reserved.
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