P87C51RA+IA,512 NXP Semiconductors, P87C51RA+IA,512 Datasheet - Page 45

IC 80C51 MCU 512 ROMLESS 44PLCC

P87C51RA+IA,512

Manufacturer Part Number
P87C51RA+IA,512
Description
IC 80C51 MCU 512 ROMLESS 44PLCC
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet

Specifications of P87C51RA+IA,512

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
UART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Package
44PLCC
Device Core
80C51
Family Name
87C
Maximum Speed
16 MHz
For Use With
OM10064 - EMULATOR 80C51 PDS51-MK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
935252790512
P87C51RA+IA
P87C51RA+IA
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
3. V
*
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
Table 9. EPROM Programming Modes
NOTES:
Table 10. Program Security Bits for EPROM Devices
NOTES:
2000 Aug 07
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
12.75V. Each programming pulse is low for 100 s ( 10 s) and high for a minimum of 10 s.
1
2
3
4
PP
CC
PROGRAM LOCK BITS
= 12.75V 0.25V.
= 5V 10% during programming and verification.
SB1
U
P
P
P
MODE
SB2
U
U
P
P
1, 2
SB3
U
U
U
P
RST
PROTECTION DESCRIPTION
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
Same as 2, also verify is disabled.
Same as 3, external execution is disabled.
1
1
1
1
1
1
1
PSEN
0
0
0
0
0
0
0
ALE/PROG
0*
0*
0*
0*
0*
1
1
45
EA/V
V
V
V
V
V
1
PP
1
PP
PP
PP
PP
PP
8XC51RA+/RB+/RC+/RD+/80C51RA+
P2.7
0
1
0
1
1
1
0
8XC51FA/FB/FC/80C51FA
P2.6
0
0
0
0
1
1
1
P3.7
Product specification
0
1
1
1
1
0
0
PP
8XC54/58
is held at
P3.6
0
1
1
0
1
0
1

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