P87C51RB2BBD,157 NXP Semiconductors, P87C51RB2BBD,157 Datasheet - Page 58

• Manufacturer Part Number: P87C51RB2BBD,157
• Description: IC 80C51 MCU 512 RAM 44LQFP
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C51RB2BBD,157

• Program Memory Type: OTP
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 44-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10064 - EMULATOR 80C51 PDS51-MK2
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935271877157; P87C51RB2BBD; P87C51RB2BBD

1. Not tested.
*
**
Philips Semiconductors
EPROM PROGRAMMING AND VERIFICATION CHARACTERISTICS
T
NOTE:
NOTES:
2003 Jan 24
amb
SYMBOL
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
V
I
1/t
t
t
t
t
t
t
t
t
t
t
t
t
FOR PROGRAMMING CONFIGURATION SEE FIGURE 47.
FOR VERIFICATION CONDITIONS SEE FIGURE 49.
SEE TABLE 8.
PP
AVGL
GHAX
DVGL
GHDX
EHSH
SHGL
GHSL
GLGH
AVQV
ELQZ
EHQZ
GHGL
PP
= 21 C to +27 C, V
CLCL
P0.0 – P0.7
ALE/PROG
(A0 – A14)
P1.0–P1.7
P2.0–P2.5
(D0 – D7)
PORT 0
EA/V
P2.7
P3.4
PP
**
Programming supply voltage
Programming supply current
Oscillator frequency
Address setup to PROG low
Address hold after PROG
Data setup to PROG low
Data hold after PROG
P2.7 (ENABLE) high to V
V
V
PROG width
Address to data valid
ENABLE low to data valid
Data float after ENABLE
PROG high to PROG low
PP
PP
setup to PROG low
hold after PROG
CC
t
= 5V 10%, V
t
AVGL
DVGL
t
EHSH
t
SHGL
t
GLGH
SS
PP
PROGRAMMING
= 0V (See Figure 50)
Figure 50. EPROM Programming and Verification
8KB/16KB/32KB/64KB OTP
ADDRESS
DATA IN
PARAMETER
*
t
GHGL
LOGIC 0
t
t
GHDX
GHAX
58
t
GHSL
LOGIC 1
t
ELQV
P87C51RA2/RB2/RC2/RD2
VERIFICATION
t
AVQV
ADDRESS
48t
48t
48t
48t
48t
LOGIC 1
DATA OUT
MIN
12.5
10
10
90
10
CLCL
CLCL
CLCL
CLCL
CLCL
4
0
*
48t
48t
48t
t
EHQZ
MAX
13.0
50
110
CLCL
CLCL
CLCL
6
1
Product data
SU00871
UNIT
MHz
mA
V
s
s
s
s