P89LPC9361FDH,518 NXP Semiconductors, P89LPC9361FDH,518 Datasheet - Page 80
P89LPC9361FDH,518
Manufacturer Part Number
P89LPC9361FDH,518
Description
MCU 80C51 16KB FLASH 28TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet
1.P89LPC9351FA112.pdf
(94 pages)
Specifications of P89LPC9361FDH,518
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
26
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8 bit, 4 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935289566518
NXP Semiconductors
P89LPC9331_9341_9351_9361
Product data sheet
Fig 41. External clock timing (with an amplitude of at least V
Fig 42. Shift register mode timing
Fig 43. SPI master timing (CPHA = 0)
write to SBUF
output data
input data
clear RI
(CPOL = 0)
(CPOL = 1)
11.1 Waveforms
SPICLK
SPICLK
(output)
(output)
(output)
clock
(input)
MISO
MOSI
SS
t
QVXH
t
XHDV
t
SPIF
valid
T
0
XLXL
t
t
SPIF
SPIDSU
master MSB/LSB out
t
XHDX
t
All information provided in this document is subject to legal disclaimers.
XHQX
MSB/LSB in
valid
1
t
SPIDV
t
CHCL
t
t
t
SPICLKH
SPICLKL
Rev. 5 — 10 January 2011
SPIDH
t
SPIF
8-bit microcontroller with accelerated two-clock 80C51 core
valid
2
T
P89LPC9331/9341/9351/9361
SPICYC
t
t
SPICLKH
SPICLKL
t
CLCX
t
SPIR
valid
3
t
SPIOH
i(RMS)
T
cy(clk)
t
= 200 mV)
SPIR
valid
t
4
CLCH
t
CHCX
master LSB/MSB out
valid
LSB/MSB in
5
t
SPIDV
002aaa907
valid
6
002aaa908
valid
set TI
set RI
7
© NXP B.V. 2011. All rights reserved.
t
SPIR
002aaa906
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