AT91M55800A-33AU Atmel, AT91M55800A-33AU Datasheet - Page 11

IC ARM MCU 33MHZ 176-LQFP

AT91M55800A-33AU

Manufacturer Part Number
AT91M55800A-33AU
Description
IC ARM MCU 33MHZ 176-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91M55800A-33AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LQFP
Cpu Family
91M
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
33MHz
Interface Type
EBI/SPI/USART
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
58
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
176
Package Type
LQFP
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
58
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91EB55
Minimum Operating Temperature
- 40 C
For Use With
AT91EB55 - KIT EVAL FOR ARM AT91M55800A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91M55800A-33AU
Manufacturer:
Atmel
Quantity:
10 000
5.2.2
1745FS–ATARM–18-Apr-06
User Peripherals
The Real-time Clock (RTC) peripheral is designed for very low power consumption, and com-
bines a complete time-of-day clock with alarm and a two-hundred year Gregorian calendar,
complemented by a programmable periodic interrupt.
The Parallel Input/Output Controllers (PIOA and PIOB) control the 58 I/O lines. They enable
the user to select specific pins for on-chip peripheral input/output functions, and general-pur-
pose input/output signal pins. The PIO controllers can be programmed to detect an interrupt
on a signal change from each line.
The Watchdog (WD) can be used to prevent system lock-up if the software becomes trapped
in a deadlock.
The Special Function (SF) module integrates the Chip ID and Reset Status registers.
Three USARTs, independently configurable, enable communication at a high baud rate in syn-
chronous or asynchronous mode. The format includes start, stop and parity bits and up to 8
data bits. Each USART also features a Timeout and a Time Guard Register, facilitating the
use of the two dedicated Peripheral Data Controller (PDC) channels.
The six 16-bit Timer/Counters (TC) are highly programmable and support capture or waveform
modes. Each TC channel can be programmed to measure or generate different kinds of
waves, and can detect and control two input/output signals. Each TC also has three external
clock signals.
The SPI provides communication with external devices in master or slave mode. It has four
external chip selects which can be connected to up to 15 devices. The data length is program-
mable, from 8- to 16-bit.
The two identical 4-channel 10-bit analog-to-digital converters (ADC) are based on a Succes-
sive Approximation Register (SAR) approach.
The two identical single-channel 10-bit digital-to-analog converters (DAC).
AT91M55800A Summary
11

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