PIC32MX695F512L-80I/PF Microchip Technology, PIC32MX695F512L-80I/PF Datasheet - Page 53
![IC MCU 32BIT 512KB FLASH 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC32MX695F512L-80I/PF
Manufacturer Part Number
PIC32MX695F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX695F512L-80I/PF
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
128KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX695F512L-80I/PF
Manufacturer:
yaskawa
Quantity:
100
Company:
Part Number:
PIC32MX695F512L-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC32MX695F512L-80I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 4-3:
Legend:
Note
10C0
10D0
10E0
10F0
1100
1110
1120
1130
1140
1150
1:
IPC10
IPC11
IPC12
IPC3
IPC4
IPC5
IPC6
IPC7
IPC8
IPC9
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
INTERRUPT REGISTER MAP FOR THE PIC32MX675F512H AND PIC32MX695F512H DEVICES
31/15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30/14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
29/13
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
28/12
—
—
—
SPI2AIP<2:0>
I2C2AIP<2:0>
CMP1IP<2:0>
RTCCIP<2:0>
DMA3IP<2:0>
DMA1IP<2:0>
DMA7IP<2:0>
DMA5IP<2:0>
INT3IP<2:0>
INT4IP<2:0>
AD1IP<2:0>
I2C1IP<2:0>
U2AIP<2:0>
USBIP<2:0>
U3BIP<2:0>
U1BIP<2:0>
IC3IP<2:0>
IC4IP<2:0>
IC5IP<2:0>
27/11
—
—
—
26/10
—
—
—
25/9
—
—
—
SPI2AIS<1:0>
I2C2AIS<1:0>
CMP1IS<1:0>
RTCCIS<1:0>
DMA3IS<1:0>
DMA1IS<1:0>
DMA7IS<1:0>
DMA5IS<1:0>
INT3IS<1:0>
INT4IS<1:0>
AD1IS<1:0>
I2C1IS<1:0>
U2AIS<1:0>
USBIS<1:0>
U3BIS<1:0>
U1BIS<1:0>
IC3IS<1:0>
IC4IS<1:0>
IC5IS<1:0>
24/8
—
—
—
Bits
23/7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
22/6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
21/5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
20/4
—
SPI1AIP<2:0>
FSCMIP<2:0>
SPI3AIP<2:0>
I2C1AIP<2:0>
CMP2IP<2:0>
I2C3AIP<2:0>
DMA2IP<2:0>
DMA0IP<2:0>
DMA6IP<2:0>
DMA4IP<2:0>
PMPIP<2:0>
OC3IP<2:0>
OC4IP<2:0>
OC5IP<2:0>
U1AIP<2:0>
U3AIP<2:0>
FCEIP<2:0>
U2BIP<2:0>
ETHIP<2:0>
CNIP<2:0>
T3IP<2:0>
T4IP<2:0>
T5IP<2:0>
19/3
—
(1)
(CONTINUED)
18/2
—
17/1
—
SPI1AIS<1:0>
I2C1AIS<1:0>
CMP2IS<1:0>
FSCMIS<1:0>
SPI3AIS<1:0>
I2C3AIS<1:0>
DMA2IS<1:0>
DMA0IS<1:0>
DMA6IS<1:0>
DMA4IS<1:0>
PMPIS<1:0>
OC3IS<1:0>
OC4IS<1:0>
OC5IS<1:0>
U1AIS<1:0>
U3AIS<1:0>
FCEIS<1:0>
U2BIS<1:0>
ETHIS<1:0>
CNIS<1:0>
T3IS<1:0>
T4IS<1:0>
T5IS<1:0>
16/0
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000