ATMEGA640V-8AU Atmel, ATMEGA640V-8AU Datasheet - Page 322
![IC MCU AVR 64K FLASH 100-TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA640V-8AU
Manufacturer Part Number
ATMEGA640V-8AU
Description
IC MCU AVR 64K FLASH 100-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA640V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, JTAG, SPI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
86
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
86
Eeprom Memory Size
4KB
Ram Memory Size
8KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA640V-8AU
Manufacturer:
PHILIPS
Quantity:
56
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28.5
2549M–AVR–09/10
Addressing the Flash During Self-Programming
The Z-pointer is used to address the SPM commands. The Z pointer consists of the Z-registers
ZL and ZH in the register file, and RAMPZ in the I/O space. The number of bits actually used is
implementation dependent. Note that the RAMPZ register is only implemented when the pro-
gram space is larger than 64 Kbytes.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
addressed independently. Therefore it is of major importance that the Boot Loader software
addresses the same page in both the Page Erase and Page Write operation. Once a program-
ming operation is initiated, the address is latched and the Z-pointer can be used for other
operations.
The (E)LPM instruction use the Z-pointer to store the address. Since this instruction addresses
the Flash byte-by-byte, also bit Z0 of the Z-pointer is used.
Figure 28-3. Addressing the Flash During SPM
Note:
Bit
RAMPZ
ZH (R31)
ZL (R30)
Z - REGISTER
The different variables used in
PROGRAM MEMORY
BIT
RAMPZ7
Z15
Z7
PAGE
23
15
PROGRAM
COUNTER
7
15
Figure
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
RAMPZ6
PCMSB
Z14
Z6
22
14
28-3. Note that the Page Erase and Page Write operations are
6
PCPAGE
ATmega640/1280/1281/2560/2561
RAMPZ5
Figure 28-3
Z13
Z5
21
13
5
ZPAGEMSB
PAGEMSB
Table 29-7 on page
PCWORD
RAMPZ4
Z12
are listed in
Z4
20
12
4
WORD ADDRESS
WITHIN A PAGE
(Note:)
1
0
0
RAMPZ3
INSTRUCTION WORD
Z11
Table 28-9 on page
19
11
Z3
3
PAGE
338), the Program Counter can
RAMPZ2
Z10
Z2
18
10
2
PCWORD[PAGEMSB:0]:
329.
00
01
02
PAGEEND
RAMPZ1
Z9
Z1
17
9
1
RAMPZ0
16
Z8
Z0
8
0
322
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